https://llvm.org/bugs/show_bug.cgi?id=31170
Bug ID: 31170
Summary: [AARCH64] SIMD instructions are emitted without proper
address alignment
Product: clang
Version: 3.8
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: LLVM Codegen
Assignee: unassignedclangb...@nondot.org
Reporter: sergio.more...@gmail.com
CC: llvm-bugs@lists.llvm.org
Classification: Unclassified
Created attachment 17656
--> https://llvm.org/bugs/attachment.cgi?id=17656&action=edit
Sample C code
Hi,
I'm compiling a very simple memset() implementation for AARCH64. See the
attached file.
clang is generating a couple of SIMD store instructions without checking if the
address is aligned. When run on a target (e.g. Hikey board) it crashes with an
alignment fault.
I tested both clang-3.8 that is available on Ubuntu 16.04 Server, as well as a
build of clang-4.0 from SVN.
$ /opt/llvm/bin/clang-4.0 --target=aarch64 -c -O2 LibC.c -o LibC.o -isystem
/usr/aarch64-linux-gnu/include/
$ aarch64-linux-gnu-objdump -d -x LibC.o
<snipped>
0000000000000088 <memset>:
88: b40002c2 cbz x2, e0 <memset+0x58>
8c: f100805f cmp x2, #0x20
90: 540001e3 b.cc cc <memset+0x44>
94: 927be84a and x10, x2, #0xffffffffffffffe0
98: b40001aa cbz x10, cc <memset+0x44>
9c: 8b0a0008 add x8, x0, x10
a0: cb0a0049 sub x9, x2, x10
a4: 4e010c20 dup v0.16b, w1
a8: 9100400b add x11, x0, #0x10
ac: aa0a03ec mov x12, x10
b0: ad3f8160 stp q0, q0, [x11,#-16] <- x11 can be unaligned.
<snipped>
Let me know if you need more information.
$ /opt/llvm/bin/clang-4.0 -v
clang version 4.0.0 (trunk 287757)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/llvm/bin
Found candidate GCC installation: /usr/lib/gcc/x86_64-linux-gnu/5
Found candidate GCC installation: /usr/lib/gcc/x86_64-linux-gnu/5.4.0
Found candidate GCC installation: /usr/lib/gcc/x86_64-linux-gnu/6
Found candidate GCC installation: /usr/lib/gcc/x86_64-linux-gnu/6.0.0
Selected GCC installation: /usr/lib/gcc/x86_64-linux-gnu/5.4.0
Candidate multilib: .;@m64
Selected multilib: .;@m64
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