| Issue |
208912
|
| Summary |
[AMDGPU][MC] gfx1100/gfx1101/gfx1102: "Unsupported instruction : <MCInst 4399 ...>" from AsmPrinter on plain `store double` — fixed on main, still broken in 22.1.8
|
| Labels |
|
| Assignees |
|
| Reporter |
talhaHavadar
|
## Summary
On `release/22.x` (through `llvmorg-22.1.8`), `llc` / `clang -cc1 -emit-obj`
fatally errors while lowering a trivial `store double 0.0` on the flat
address space for `-mcpu=gfx1100`, `gfx1101`, or `gfx1102` (RDNA3
desktop). No other AMDGPU target is affected — GCN, CDNA, RDNA1, RDNA2,
RDNA3.5 (gfx1151), and RDNA4 (gfx1200/gfx1201) all codegen the same input
cleanly.
The bug is already fixed on `main` (verified against clang-23 nightly
`++20260707111625+de348bcd5f78-1~exp1`, snapshot 2026-07-07). Filing this so
we can identify the fix commit and, ideally, request a backport to
`release/22.x`.
## Reproducer
Minimal, self-contained LLVM IR reduced by `llvm-reduce-22` from a real
PyTorch/ROCm build failure:
```llvm
target datalayout = "e-m:e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128:128:48-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9"
target triple = "amdgcn-amd-amdhsa"
declare void @llvm.trap() #0
define amdgpu_kernel void @_ZN2at6native12_GLOBAL__N_139nll_loss_backward_reduce_cuda_kernel_1dIdlEEvPT_PKS3_S6_PKT0_S6_bll(i64 %0, i1 %1, ptr %2) {
br i1 %1, label %5, label %4
4:
call void @llvm.trap()
unreachable
5:
%6 = getelementptr double, ptr %2, i64 %0
store double 0.000000e+00, ptr %6, align 8
ret void
}
attributes #0 = { cold noreturn nounwind memory(inaccessiblemem: write) }
```
The mangled name decodes to `at::native::(anonymous)::nll_loss_backward_reduce_cuda_kernel_1d<double, long>` — kept as-is for provenance, the crash does not depend on the name.
Command:
```sh
llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1102 -O3 -filetype=obj repro.ll -o /tmp/out.o
```
Same result with `-O0`, `-O1`, `-O2`, `-O3`, so this is not an optimizer bug.
## Behaviour matrix (same input, same command, only `-mcpu` varied)
| target | class | clang-22.1.8 llc | clang-23 nightly (de348bcd5f78) llc |
|-------------|----------------|:----------------:|:-----------------------------------:|
| gfx803 | GCN 4 | OK | OK |
| gfx900 | GCN 5 | OK | OK |
| gfx906 | GCN 5 | OK | OK |
| gfx908 | CDNA 1 | OK | OK |
| gfx90a | CDNA 2 | OK | OK |
| gfx942 | CDNA 3 (MI300) | OK | OK |
| gfx1010 | RDNA1 | OK | OK |
| gfx1030 | RDNA2 | OK | OK |
| **gfx1100** | **RDNA3** | **FAIL** | OK |
| **gfx1101** | **RDNA3** | **FAIL** | OK |
| **gfx1102** | **RDNA3** | **FAIL** | OK |
| gfx1151 | RDNA3.5 | OK | OK |
| gfx1200 | RDNA4 | OK | OK |
| gfx1201 | RDNA4 | OK | OK |
## Crash
```
LLVM ERROR: Unsupported instruction : <MCInst 4399 <MCOperand Reg:7675> <MCOperand Reg:7676> <MCOperand Reg:7675>>
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace and instructions to reproduce the bug.
Stack dump:
0. Program arguments: /usr/lib/llvm-22/bin/llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1102 -O3 -filetype=obj repro.ll -o /tmp/out.o
1. Running pass 'CallGraph Pass Manager' on module 'repro.ll'.
2. Running pass 'AMDGPU Assembly Printer' on function '@kern'
#7 llvm::report_fatal_error(llvm::Twine const&, bool)
#13 llvm::MCObjectStreamer::emitInstToData(llvm::MCInst const&, llvm::MCSubtargetInfo const&)
#15 llvm::AsmPrinter::emitFunctionBody()
#17 llvm::MachineFunctionPass::runOnFunction(llvm::Function&)
```
So the fatal path is `AMDGPU AsmPrinter → MCObjectStreamer::emitInstToData → codec → report_fatal_error`. Codegen selected `MCInst` opcode `4399` (whatever tablegen entry that is on `release/22.x`) for the store, and the gfx1102 MC encoder rejects it.
The `Unsupported instruction : ` string itself comes from `MCCodeEmitter::reportUnsupportedInst` in `llvm/lib/MC/MCCodeEmitter.cpp`.
## Ruled out
- Optimization level: crashes at `-O0`, `-O1`, `-O2`, `-O3`.
- IR shape: the reduced test uses no FP16/BF16, no atomics, no reductions,
no vector types, no wave intrinsics, no `-fcuda-*`. It's a plain
`store double 0.0` at a computed flat-AS offset inside an `amdgpu_kernel`.
- Address space: uses default (0, flat). Reduction did not eliminate the
`getelementptr` / `store` pair — that combination appears to be load-bearing.
## Origin
The reduced case was extracted from a PyTorch 2.12.1 (Debian pytorch-rocm
packaging) build failure while compiling
`aten/src/ATen/native/hip/Loss.hip`, which is the hipified form of
`aten/src/ATen/native/cuda/Loss.cu`. The `.s` produced with
`-save-temps=obj` cuts off at the metadata for
`at::native::(anonymous)::nll_loss_backward_reduce_cuda_kernel_1d<double, long>`,
which is the kernel the reduced `.ll` came from (name preserved for
provenance; the crash does not depend on the name).
## Related issues
- #153812 (open, 2025-08): *"SIFoldOperands generates unsupported instruction V_ADD_CO_U32_e32"* — the closest sibling. Same failure class (a codegen pass produces an MCInst opcode with no valid MC encoding for the current subtarget), reported for gfx1200. Different specific opcode.
- #71685 (closed): SIFoldOperands V_FMA_F32_e64 constant-bus violation.
- #139908 (closed): SIFoldOperands folding constant splat reg_sequence.
- #181442 (open, MIPS): identical error-line pattern `Unsupported instruction : <MCInst 0 …>` on MIPS — same MC-layer report path.
- 2022-09-08 commit *"[AMDGPU] Fix shrinking of F16 FMA on newer subtargets"* — historical fix in the same family.
## Environment used to reproduce
- Base: `lxc launch --ephemeral images:debian/sid`
- clang-22 = `1:22.1.8-1+b1` (Debian sid main; equivalent to Ubuntu resolute's `llvm-toolchain-22` binary).
- clang-23 = `1:23~++20260707111625+de348bcd5f78-1~exp1` (apt.llvm.org `unstable` channel).
- Bitcode was produced by clang-22.1.8 `-save-temps=obj` from real PyTorch
source, then reduced by `llvm-reduce-22`.
## Next step from my side
Happy to bisect the `llvmorg-22.1.8..de348bcd5f78` window to identify the fix commit, if that would help toward a `release/22.x` backport.
![]()
_______________________________________________
llvm-bugs mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-bugs
