| Issue |
204228
|
| Summary |
[X86][AArch64] failed to lower complex float16 as native instructions
|
| Labels |
new issue
|
| Assignees |
|
| Reporter |
Andarwinux
|
https://dzone.com/articles/vectorization-in-llvm-and-gcc-for-intel-cpus-and-g
https://godbolt.org/z/6TGGP1Ev6
```c
#include <complex.h>
void fmaconj (_Complex _Float16 a[restrict 16],
_Complex _Float16 b[restrict 16],
_Complex _Float16 c[restrict 16])
{
for (int i = 0; i < 16; i++)
c[i] += a[i] * ~b[i];
}
```
gcc avx512fp16
```asm
"fmaconj":
vmovdqu16 zmm0, ZMMWORD PTR [rdx]
vmovdqu16 zmm1, ZMMWORD PTR [rdi]
vfcmaddcph zmm0, zmm1, ZMMWORD PTR [rsi]
vmovdqu16 ZMMWORD PTR [rdx], zmm0
vzeroupper
ret
```
clang avx512fp16
```asm
fmaconj:
vmovdqu64 zmm0, zmmword ptr [rdi]
vmovdqu64 zmm1, zmmword ptr [rsi]
vpshufb zmm2, zmm1, zmmword ptr [rip + .LCPI0_0]
vprold zmm3, zmm0, 16
vpshufb zmm1, zmm1, zmmword ptr [rip + .LCPI0_1]
vmulph zmm1, zmm3, zmm1
vfmsubadd231ph zmm1, zmm0, zmm2
vaddph zmm0, zmm1, zmmword ptr [rdx]
vmovups zmmword ptr [rdx], zmm0
vzeroupper
ret
```
gcc aarch64
```asm
fmaconj:
ldp q22, q25, [x0]
ldp q21, q24, [x1]
ldp q20, q23, [x2]
ldp q28, q31, [x0, 32]
ldp q26, q29, [x2, 32]
fcmla v20.8h, v21.8h, v22.8h, #0
fcmla v23.8h, v24.8h, v25.8h, #0
fcmla v20.8h, v21.8h, v22.8h, #270
fcmla v23.8h, v24.8h, v25.8h, #270
str q20, [x2]
ldp q27, q30, [x1, 32]
fcmla v26.8h, v27.8h, v28.8h, #0
fcmla v29.8h, v30.8h, v31.8h, #0
fcmla v26.8h, v27.8h, v28.8h, #270
fcmla v29.8h, v30.8h, v31.8h, #270
stp q23, q26, [x2, 16]
str q29, [x2, 48]
ret
```
clang aarch64
```asm
fmaconj:
ldp q0, q1, [x0]
ldp q2, q3, [x1]
ldp q4, q5, [x0, #32]
ldp q6, q7, [x1, #32]
uzp1 v16.8h, v2.8h, v0.8h
uzp2 v17.8h, v0.8h, v0.8h
uzp1 v20.8h, v3.8h, v0.8h
uzp1 v18.8h, v0.8h, v0.8h
uzp2 v19.8h, v2.8h, v0.8h
fmul v16.8h, v16.8h, v17.8h
uzp2 v17.8h, v1.8h, v0.8h
fmul v17.8h, v20.8h, v17.8h
uzp1 v20.8h, v6.8h, v0.8h
fmls v16.8h, v18.8h, v19.8h
uzp1 v18.8h, v1.8h, v0.8h
uzp2 v19.8h, v3.8h, v0.8h
fmul v1.8h, v3.8h, v1.8h
fmls v17.8h, v18.8h, v19.8h
uzp2 v18.8h, v4.8h, v0.8h
uzp1 v19.8h, v4.8h, v0.8h
fmul v18.8h, v20.8h, v18.8h
uzp2 v20.8h, v6.8h, v0.8h
fmls v18.8h, v19.8h, v20.8h
uzp1 v19.8h, v7.8h, v0.8h
uzp2 v20.8h, v5.8h, v0.8h
fmul v0.8h, v2.8h, v0.8h
fmul v2.8h, v6.8h, v4.8h
ldp q3, q4, [x2]
fmul v19.8h, v19.8h, v20.8h
faddp v0.8h, v0.8h, v0.8h
zip1 v0.8h, v0.8h, v16.8h
faddp v1.8h, v1.8h, v0.8h
faddp v2.8h, v2.8h, v0.8h
fadd v0.8h, v0.8h, v3.8h
zip1 v1.8h, v1.8h, v17.8h
uzp1 v3.8h, v5.8h, v0.8h
zip1 v2.8h, v2.8h, v18.8h
fadd v1.8h, v1.8h, v4.8h
stp q0, q1, [x2]
uzp2 v0.8h, v7.8h, v0.8h
fmls v19.8h, v3.8h, v0.8h
ldp q0, q1, [x2, #32]
fadd v0.8h, v2.8h, v0.8h
fmul v2.8h, v7.8h, v5.8h
faddp v2.8h, v2.8h, v0.8h
zip1 v2.8h, v2.8h, v19.8h
fadd v1.8h, v2.8h, v1.8h
stp q0, q1, [x2, #32]
ret
```
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