https://llvm.org/bugs/show_bug.cgi?id=27897
Bug ID: 27897
Summary: [ppc] slow vector load instruction
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: Backend: PowerPC
Assignee: unassignedb...@nondot.org
Reporter: car...@google.com
CC: llvm-bugs@lists.llvm.org
Classification: Unclassified
Compile the following code with options
-mvsx -mcpu=power8 -O2
struct A{
char* buf;
char* end;
long long size() {
return static_cast<long long>(end - buf);
}
long long foo();
};
long long A::foo()
{
if (size() > 9 || end > buf)
return 2;
return -1;
}
Trunk llvm generates:
# BB#0: # %entry
lxvd2x 0, 0, 3 // A
xxswapd 34, 0 // B
mfvsrd 3, 0 // C
mfvsrd 4, 34 // D
sub 3, 4, 3
cmpdi 3, 9
ble 0, .LBB0_2
# BB#1: # %return
li 3, 2
blr
.LBB0_2: # %lor.lhs.false
mfvsrd 3, 0
li 12, 2
mfvsrd 4, 34
cmpld 4, 3
li 3, -1
isel 3, 12, 3, 1
blr
Note that instructions ABCD are much slower than two simple general register
load instructions.
Looks like a cost model problem.
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