https://llvm.org/bugs/show_bug.cgi?id=27545
Bug ID: 27545
Summary: atomic_signal_fence generates a dmb instruction on
aarch64
Product: libraries
Version: trunk
Hardware: PC
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: Backend: AArch64
Assignee: unassignedb...@nondot.org
Reporter: yyc1...@gmail.com
CC: llvm-bugs@lists.llvm.org
Classification: Unclassified
The following program
```
#include <stdatomic.h>
void f()
{
atomic_signal_fence(memory_order_seq_cst);
}
```
generates
```
f: // @f
// BB#0:
dmb ish
ret
```
when compiling with `clang -O2` and simply a `ret` when compiling with `gcc`.
Since this is a signal fence and not a thread fence, I think the memory barrier
instruction should not be necessary.
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