https://llvm.org/bugs/show_bug.cgi?id=27328
Bug ID: 27328
Summary: [ARM] missed pattern for and-not + compare (bics)
Product: libraries
Version: trunk
Hardware: PC
OS: All
Status: NEW
Severity: normal
Priority: P
Component: Backend: ARM
Assignee: unassignedb...@nondot.org
Reporter: spatel+l...@rotateright.com
CC: llvm-bugs@lists.llvm.org
Classification: Unclassified
define i1 @andnot_cmp(i32 %x, i32 %y) {
%noty = xor i32 %y, -1
%and = and i32 %x, %noty
%cmp = icmp eq i32 %and, 0
ret i1 %cmp
}
I don't know ARM very well, but couldn't this be "bics"?
$ ./llc -o - andn.ll -mtriple=armv7-apple-darwin -mcpu=cortex-a8
_andnot_cmp:
@ BB#0:
mvn r2, r1
mov r1, #0
tst r0, r2
movweq r1, #1
mov r0, r1
bx lr
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