https://llvm.org/bugs/show_bug.cgi?id=26024
Bug ID: 26024 Summary: [AArch64] Regression introduced by r255388 (match min/max if the scalar operation is legal) Product: tools Version: trunk Hardware: PC OS: Linux Status: NEW Severity: normal Priority: P Component: llc Assignee: unassignedb...@nondot.org Reporter: apa...@codeaurora.org CC: llvm-bugs@lists.llvm.org Classification: Unclassified Hi Matt, I came across a failure on AArch64 that seems to have been introduced with commit r255388 - SelectionDAG: Match min/max if the scalar operation is legal. Here is a reduced test case: ; RUN: llc < %s -mtriple=aarch64-linux-gnu | FileCheck %s define i8 @test(<4 x i8> %a) { %low = shufflevector <4 x i8> %a, <4 x i8> undef, <2 x i32> <i32 0, i32 1> %high = shufflevector <4 x i8> %a, <4 x i8> undef, <2 x i32> <i32 2, i32 3> %1 = icmp sgt <2 x i8> %low, %high %2 = select <2 x i1> %1, <2 x i8> %low, <2 x i8> %high %3 = extractelement <2 x i8> %2, i32 0 ret i8 %3 } Before your patch, we see the code to extract the byte values from the promoted vectors before comparing the vectors: // BB#0: umov w8, v0.h[0] umov w9, v0.h[2] fmov s1, w8 fmov s2, w9 umov w8, v0.h[1] ins v1.s[1], w8 umov w8, v0.h[3] ins v2.s[1], w8 shl v0.2s, v1.2s, #24 shl v3.2s, v2.2s, #24 sshr v0.2s, v0.2s, #24 sshr v3.2s, v3.2s, #24 cmgt v0.2s, v0.2s, v3.2s bsl v0.8b, v1.8b, v2.8b fmov w0, s0 ret With your patch, smax is generated directly based on the promoted vector type: // BB#0: umov w8, v0.h[0] umov w9, v0.h[1] umov w10, v0.h[2] umov w11, v0.h[3] fmov s0, w8 fmov s1, w10 ins v0.s[1], w9 ins v1.s[1], w11 smax v0.2s, v0.2s, v1.2s fmov w0, s0 ret This is causing some benchmark miscompares in my AArhc64 workloads. Can you take a look please? -- You are receiving this mail because: You are on the CC list for the bug.
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