Hi Alex,

The correct list for this is 
llvm-...@lists.llvm<mailto:llvm-...@lists.llvm>.org. I’d CC them but it’s 
probably best you just re-send your email there so it arrives with full context.

James
On 16 Nov 2015, at 11:04, Alex Turjan via llvm-bugs 
<llvm-bugs@lists.llvm.org<mailto:llvm-bugs@lists.llvm.org>> wrote:


Hi all,

I'm currently building a vliw port based on a llvm 3.5.0 from 2014, where I 
have enabled the MachineScheduler to run bottom up.

I see that there is an issue with respect to the moment when instructions move 
from pending to ready.

Namely instructions which should still be pending become ready too earlysuch 
that I end up with true dependent instructions being issued at the same cycle.I 
think the issue comes from ScheduleDAGMILive::schedule() function.

Inside it the updating of the queues happens before SchedImpl->schedNode(SU, 
IsTopNode) is being called while should have happened after.

See bellow the code fragment where perhaps the call from 1020 should be after 
line 1032:

1020: updateQueues(SU, IsTopNode);

   if (DFSResult) {

   unsigned SubtreeID = DFSResult->getSubtreeID(SU);

   if (!ScheduledTrees.test(SubtreeID)) {

      ScheduledTrees.set(SubtreeID);

      DFSResult->scheduleTree(SubtreeID);

      SchedImpl->scheduleTree(SubtreeID);

   }

}

// Notify the scheduling strategy after updating the DAG.

1032: SchedImpl->schedNode(SU, IsTopNode);


The MachineScheduler.cpp file that I use in my port you can see 
here:http://llvm.org/viewvc/llvm-project/llvm/branches/release_35/lib/CodeGen/MachineScheduler.cpp?revision=215011&view=markup

For oo machines the issue that I observe wont trigger a bug but in my case as 
im porting llvmto a vliw (where i produce bundles) instructions becoming ready 
too early leads to incorrect code. However for oo machines I think this issue 
may induce a performance
loss as less instructions that can be issued in parallel endup up next to each 
other.


thanks,

Alex

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