https://llvm.org/bugs/show_bug.cgi?id=25157
Bug ID: 25157
Summary: PowerPC misoptimization for scalar float -> vector
float load
Product: new-bugs
Version: 3.7
Hardware: Other
OS: Linux
Status: NEW
Severity: normal
Priority: P
Component: new bugs
Assignee: unassignedb...@nondot.org
Reporter: eric.schwe...@pgroup.com
CC: llvm-bugs@lists.llvm.org
Classification: Unclassified
In PPCDAGToDagISel::Select() under the case ISD::VECTOR_SHUFFLE, there is an
optimization to convert a shuffle into a LXVDSX instruction (Load VSX Vector
Doubleword, Splat Indexed). This works great when the values in memory is
actually a doubleword. Unfortunately, it produces incorrect results when the
value is only, say, a word in length and to be converted to a double after the
load.
Here is a possible fix:
@@ -2786,7 +2786,7 @@ SDNode *PPCDAGToDAGISel::Select(SDNode *N) {
LoadSDNode *LD = cast<LoadSDNode>(Op1.getOperand(0));
SDValue Base, Offset;
- if (LD->isUnindexed() &&
+ if (LD->isUnindexed() && LD->getMemoryVT() == MVT::f64 &&
SelectAddrIdxOnly(LD->getBasePtr(), Base, Offset)) {
SDValue Chain = LD->getChain();
SDValue Ops[] = { Base, Offset, Chain };
--
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