https://github.com/snehasish updated 
https://github.com/llvm/llvm-project/pull/177707

>From c1155980dbc1b844e2d07113795a74f1f281dd89 Mon Sep 17 00:00:00 2001
From: Snehasish Kumar <[email protected]>
Date: Sat, 24 Jan 2026 00:06:53 +0000
Subject: [PATCH] [InstCombine] Preserve !prof metadata when creating select
 instructions.

---
 .../InstCombine/InstructionCombining.cpp      |  4 +++-
 .../select-binop-associative-prof.ll          | 19 +++++++++++++++++++
 2 files changed, 22 insertions(+), 1 deletion(-)
 create mode 100644 
llvm/test/Transforms/InstCombine/select-binop-associative-prof.ll

diff --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp 
b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
index f449d29f323d0..e89b8758895da 100644
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -1916,7 +1916,9 @@ Instruction 
*InstCombinerImpl::foldBinOpSelectBinOp(BinaryOperator &Op) {
   if (!NewTV || !NewFV)
     return nullptr;
 
-  Value *NewSI = Builder.CreateSelect(SI->getCondition(), NewTV, NewFV);
+  Value *NewSI =
+      Builder.CreateSelect(SI->getCondition(), NewTV, NewFV, "",
+                           ProfcheckDisableMetadataFixes ? nullptr : SI);
   return BinaryOperator::Create(Op.getOpcode(), NewSI, Input);
 }
 
diff --git a/llvm/test/Transforms/InstCombine/select-binop-associative-prof.ll 
b/llvm/test/Transforms/InstCombine/select-binop-associative-prof.ll
new file mode 100644
index 0000000000000..adc8a697274f8
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/select-binop-associative-prof.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 
UTC_ARGS: --check-globals smart
+; RUN: opt -passes=instcombine -S < %s | FileCheck %s
+
+define i32 @test_fold(i1 %c, i32 %fv) {
+; CHECK-LABEL: @test_fold(
+; CHECK-NEXT:    [[NEWSI:%.*]] = select i1 [[C:%.*]], i32 15, i32 10, !prof 
[[PROF1:![0-9]+]]
+; CHECK-NEXT:    [[OP:%.*]] = add i32 [[NEWSI]], [[FV:%.*]]
+; CHECK-NEXT:    ret i32 [[OP]]
+;
+  %tv = add i32 %fv, 5
+  %sel = select i1 %c, i32 %tv, i32 %fv, !prof !0
+  %op = add i32 %sel, 10
+  ret i32 %op
+}
+
+!0 = !{!"branch_weights", i32 10, i32 90}
+;.
+; CHECK: [[PROF1]] = !{!"branch_weights", i32 10, i32 90}
+;.

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