[llvm-branch-commits] [llvm] [RISCV] Schedule RVV instructions with compatible type first (PR #95924)

Wed, 07 Jan 2026 23:03:59 -0800 

================
@@ -1834,6 +1843,10 @@ def TuneDisableLatencySchedHeuristic
     : SubtargetFeature<"disable-latency-sched-heuristic", 
"DisableLatencySchedHeuristic", "true",
                        "Disable latency scheduling heuristic">;
 
+def TuneEnableVTypeSchedHeuristic
+    : SubtargetFeature<"enable-vtype-sched-heuristic", 
"EnableVTypeSchedHeuristic", "true",
----------------
lukel97 wrote:

Rename this something like `enable-vsetvli-sched-heuristic`?

https://github.com/llvm/llvm-project/pull/95924
_______________________________________________
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

Reply via email to