https://github.com/frederik-h created https://github.com/llvm/llvm-project/pull/172681
The pass now contains a non-fp expansion and should be used for any similar expansions regardless of the types involved. Hence a generic name seems apt. Rename the source files, pass, and adjust the pass description. Move all tests for the expansions that have previously been merged into the pass to a single directory. >From 59030435e419e51b72b7bf034ab38445c46b2009 Mon Sep 17 00:00:00 2001 From: Frederik Harwath <[email protected]> Date: Wed, 17 Dec 2025 08:57:12 -0500 Subject: [PATCH] [CodeGen] Rename expand-fp to expand-ir-insts The pass now contains a non-fp expansion and should be used for any similar expansions regardless of the types involved. Hence a generic name seems apt. Rename the source files, pass, and adjust the pass description. Move all tests for the expansions that have previously been merged into the pass to a single directory. --- llvm/docs/WritingAnLLVMPass.rst | 2 +- .../CodeGen/{ExpandFp.h => ExpandIRInsts.h} | 12 ++-- llvm/include/llvm/CodeGen/Passes.h | 4 +- llvm/include/llvm/CodeGen/TargetLowering.h | 12 ++-- llvm/include/llvm/InitializePasses.h | 2 +- llvm/include/llvm/Passes/CodeGenPassBuilder.h | 4 +- llvm/lib/CodeGen/CMakeLists.txt | 2 +- llvm/lib/CodeGen/CodeGen.cpp | 2 +- .../{ExpandFp.cpp => ExpandIRInsts.cpp} | 70 +++++++++++-------- llvm/lib/CodeGen/TargetPassConfig.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 8 +-- llvm/lib/Passes/PassRegistry.def | 6 +- llvm/test/CodeGen/AArch64/O0-pipeline.ll | 2 +- llvm/test/CodeGen/AArch64/O3-pipeline.ll | 2 +- llvm/test/CodeGen/AMDGPU/dagcombine-select.ll | 4 +- llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll | 2 +- llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll | 6 +- llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 10 +-- llvm/test/CodeGen/ARM/O3-pipeline.ll | 2 +- llvm/test/CodeGen/LoongArch/O0-pipeline.ll | 2 +- llvm/test/CodeGen/LoongArch/opt-pipeline.ll | 2 +- llvm/test/CodeGen/M68k/pipeline.ll | 2 +- llvm/test/CodeGen/PowerPC/O0-pipeline.ll | 2 +- llvm/test/CodeGen/PowerPC/O3-pipeline.ll | 2 +- llvm/test/CodeGen/RISCV/O0-pipeline.ll | 2 +- llvm/test/CodeGen/RISCV/O3-pipeline.ll | 2 +- llvm/test/CodeGen/SPIRV/llc-pipeline.ll | 4 +- llvm/test/CodeGen/X86/O0-pipeline.ll | 2 +- .../CodeGen/X86/expand-large-fp-optnone.ll | 2 +- llvm/test/CodeGen/X86/opt-pipeline.ll | 2 +- .../ExpandFp/AMDGPU/pass-parameters.ll | 20 ------ .../AMDGPU/frem-inf.ll | 4 +- .../AMDGPU/frem.ll | 2 +- .../AMDGPU/lit.local.cfg | 0 .../AMDGPU/missing-analysis.ll | 2 +- .../ExpandIRInsts/AMDGPU/pass-parameters.ll | 20 ++++++ .../X86/expand-large-fp-convert-fptosi129.ll | 4 +- .../X86/expand-large-fp-convert-fptoui129.ll | 4 +- .../X86/expand-large-fp-convert-si129tofp.ll | 4 +- .../X86/expand-large-fp-convert-ui129tofp.ll | 4 +- .../X86/expand-large-fp-optnone.ll | 6 +- .../X86/lit.local.cfg | 0 .../X86/sdiv129.ll | 4 +- .../X86/srem129.ll | 4 +- .../X86/udiv129.ll | 4 +- .../X86/urem129.ll | 4 +- .../X86/vector.ll | 4 +- .../ExpandLargeFpConvert/X86/lit.local.cfg | 2 - llvm/test/tools/opt/no-target-machine.ll | 4 +- llvm/tools/opt/optdriver.cpp | 4 +- .../gn/secondary/llvm/lib/CodeGen/BUILD.gn | 2 +- llvm/utils/profcheck-xfail.txt | 18 ++--- 52 files changed, 153 insertions(+), 145 deletions(-) rename llvm/include/llvm/CodeGen/{ExpandFp.h => ExpandIRInsts.h} (68%) rename llvm/lib/CodeGen/{ExpandFp.cpp => ExpandIRInsts.cpp} (95%) delete mode 100644 llvm/test/Transforms/ExpandFp/AMDGPU/pass-parameters.ll rename llvm/test/Transforms/{ExpandFp => ExpandIRInsts}/AMDGPU/frem-inf.ll (92%) rename llvm/test/Transforms/{ExpandFp => ExpandIRInsts}/AMDGPU/frem.ll (99%) rename llvm/test/Transforms/{ExpandFp => ExpandIRInsts}/AMDGPU/lit.local.cfg (100%) rename llvm/test/Transforms/{ExpandFp => ExpandIRInsts}/AMDGPU/missing-analysis.ll (50%) create mode 100644 llvm/test/Transforms/ExpandIRInsts/AMDGPU/pass-parameters.ll rename llvm/test/Transforms/{ExpandLargeFpConvert => ExpandIRInsts}/X86/expand-large-fp-convert-fptosi129.ll (99%) rename llvm/test/Transforms/{ExpandLargeFpConvert => ExpandIRInsts}/X86/expand-large-fp-convert-fptoui129.ll (99%) rename llvm/test/Transforms/{ExpandLargeFpConvert => ExpandIRInsts}/X86/expand-large-fp-convert-si129tofp.ll (99%) rename llvm/test/Transforms/{ExpandLargeFpConvert => ExpandIRInsts}/X86/expand-large-fp-convert-ui129tofp.ll (99%) rename llvm/test/Transforms/{ExpandLargeFpConvert => ExpandIRInsts}/X86/expand-large-fp-optnone.ll (97%) rename llvm/test/Transforms/{ExpandLargeDivRem => ExpandIRInsts}/X86/lit.local.cfg (100%) rename llvm/test/Transforms/{ExpandLargeDivRem => ExpandIRInsts}/X86/sdiv129.ll (96%) rename llvm/test/Transforms/{ExpandLargeDivRem => ExpandIRInsts}/X86/srem129.ll (96%) rename llvm/test/Transforms/{ExpandLargeDivRem => ExpandIRInsts}/X86/udiv129.ll (95%) rename llvm/test/Transforms/{ExpandLargeDivRem => ExpandIRInsts}/X86/urem129.ll (96%) rename llvm/test/Transforms/{ExpandLargeDivRem => ExpandIRInsts}/X86/vector.ll (99%) delete mode 100644 llvm/test/Transforms/ExpandLargeFpConvert/X86/lit.local.cfg diff --git a/llvm/docs/WritingAnLLVMPass.rst b/llvm/docs/WritingAnLLVMPass.rst index f475676e15367..216e693087d96 100644 --- a/llvm/docs/WritingAnLLVMPass.rst +++ b/llvm/docs/WritingAnLLVMPass.rst @@ -673,7 +673,7 @@ default optimization pipelines, e.g. (the output has been trimmed): ModulePass Manager Pre-ISel Intrinsic Lowering FunctionPass Manager - Expand fp + Expand IR instructions Expand Atomic instructions SVE intrinsics optimizations FunctionPass Manager diff --git a/llvm/include/llvm/CodeGen/ExpandFp.h b/llvm/include/llvm/CodeGen/ExpandIRInsts.h similarity index 68% rename from llvm/include/llvm/CodeGen/ExpandFp.h rename to llvm/include/llvm/CodeGen/ExpandIRInsts.h index 28e6aecc2beb5..5d3fcf75cd530 100644 --- a/llvm/include/llvm/CodeGen/ExpandFp.h +++ b/llvm/include/llvm/CodeGen/ExpandIRInsts.h @@ -1,4 +1,4 @@ -//===- ExpandFp.h -----------------------------------*- C++ -*-===// +//===- ExpandIRInsts.h -----------------------------------*- C++ -*-===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -6,8 +6,8 @@ // //===----------------------------------------------------------------------===// -#ifndef LLVM_CODEGEN_EXPANDFP_H -#define LLVM_CODEGEN_EXPANDFP_H +#ifndef LLVM_CODEGEN_EXPANDIRINSTS_H +#define LLVM_CODEGEN_EXPANDIRINSTS_H #include "llvm/IR/PassManager.h" #include "llvm/Support/CodeGen.h" @@ -16,13 +16,13 @@ namespace llvm { class TargetMachine; -class ExpandFpPass : public PassInfoMixin<ExpandFpPass> { +class ExpandIRInstsPass : public PassInfoMixin<ExpandIRInstsPass> { private: const TargetMachine *TM; CodeGenOptLevel OptLevel; public: - explicit ExpandFpPass(const TargetMachine &TM, CodeGenOptLevel OptLevel); + explicit ExpandIRInstsPass(const TargetMachine &TM, CodeGenOptLevel OptLevel); PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM); static bool isRequired() { return true; } @@ -32,4 +32,4 @@ class ExpandFpPass : public PassInfoMixin<ExpandFpPass> { } // end namespace llvm -#endif // LLVM_CODEGEN_EXPANDFP_H +#endif // LLVM_CODEGEN_EXPANDIRINSTS_H diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h index 08dabd69a48e9..fe19e6a32c680 100644 --- a/llvm/include/llvm/CodeGen/Passes.h +++ b/llvm/include/llvm/CodeGen/Passes.h @@ -547,7 +547,7 @@ LLVM_ABI FunctionPass *createExpandReductionsPass(); LLVM_ABI FunctionPass *createReplaceWithVeclibLegacyPass(); // Expands large div/rem instructions. -LLVM_ABI FunctionPass *createExpandFpPass(); +LLVM_ABI FunctionPass *createExpandIRInstsPass(); // This pass expands memcmp() to load/stores. LLVM_ABI FunctionPass *createExpandMemCmpLegacyPass(); @@ -565,7 +565,7 @@ LLVM_ABI FunctionPass *createCFIFixup(); LLVM_ABI FunctionPass *createCFIInstrInserter(); // Expands floating point instructions. -FunctionPass *createExpandFpPass(CodeGenOptLevel); +FunctionPass *createExpandIRInstsPass(CodeGenOptLevel); /// Creates CFGuard longjmp target identification pass. /// \see CFGuardLongjmp.cpp diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h index 06bc5caefd063..8ad64a852b74d 100644 --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -2220,13 +2220,13 @@ class LLVM_ABI TargetLoweringBase { } /// Returns the size in bits of the maximum div/rem the backend supports. - /// Larger operations will be expanded by ExpandFp. + /// Larger operations will be expanded by ExpandIRInsts. unsigned getMaxDivRemBitWidthSupported() const { return MaxDivRemBitWidthSupported; } /// Returns the size in bits of the maximum fp to/from int conversion the - /// backend supports. Larger operations will be expanded by ExpandFp. + /// backend supports. Larger operations will be expanded by ExpandIRInsts. unsigned getMaxLargeFPConvertBitWidthSupported() const { return MaxLargeFPConvertBitWidthSupported; } @@ -2886,13 +2886,13 @@ class LLVM_ABI TargetLoweringBase { } /// Set the size in bits of the maximum div/rem the backend supports. - /// Larger operations will be expanded by ExpandFp. + /// Larger operations will be expanded by ExpandIRInsts. void setMaxDivRemBitWidthSupported(unsigned SizeInBits) { MaxDivRemBitWidthSupported = SizeInBits; } /// Set the size in bits of the maximum fp to/from int conversion the backend - /// supports. Larger operations will be expanded by ExpandFp. + /// supports. Larger operations will be expanded by ExpandIRInsts. void setMaxLargeFPConvertBitWidthSupported(unsigned SizeInBits) { MaxLargeFPConvertBitWidthSupported = SizeInBits; } @@ -3743,12 +3743,12 @@ class LLVM_ABI TargetLoweringBase { unsigned MaxAtomicSizeInBitsSupported; /// Size in bits of the maximum div/rem size the backend supports. - /// Larger operations will be expanded by ExpandFp. + /// Larger operations will be expanded by ExpandIRInsts. unsigned MaxDivRemBitWidthSupported; /// Size in bits of the maximum fp to/from int conversion size the /// backend supports. Larger operations will be expanded by - /// ExpandFp. + /// ExpandIRInsts. unsigned MaxLargeFPConvertBitWidthSupported; /// Size in bits of the minimum cmpxchg or ll/sc operation the diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h index b4f96674bea9e..2bc00a2f71e1a 100644 --- a/llvm/include/llvm/InitializePasses.h +++ b/llvm/include/llvm/InitializePasses.h @@ -112,7 +112,7 @@ LLVM_ABI void initializeEarlyMachineLICMPass(PassRegistry &); LLVM_ABI void initializeEarlyTailDuplicateLegacyPass(PassRegistry &); LLVM_ABI void initializeEdgeBundlesWrapperLegacyPass(PassRegistry &); LLVM_ABI void initializeEHContGuardTargetsPass(PassRegistry &); -LLVM_ABI void initializeExpandFpLegacyPassPass(PassRegistry &); +LLVM_ABI void initializeExpandIRInstsLegacyPassPass(PassRegistry &); LLVM_ABI void initializeExpandMemCmpLegacyPassPass(PassRegistry &); LLVM_ABI void initializeExpandPostRALegacyPass(PassRegistry &); LLVM_ABI void initializeExpandReductionsPass(PassRegistry &); diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h index 0462adb835d89..9bf8e1976fad8 100644 --- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h +++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h @@ -32,7 +32,7 @@ #include "llvm/CodeGen/DetectDeadLanes.h" #include "llvm/CodeGen/DwarfEHPrepare.h" #include "llvm/CodeGen/EarlyIfConversion.h" -#include "llvm/CodeGen/ExpandFp.h" +#include "llvm/CodeGen/ExpandIRInsts.h" #include "llvm/CodeGen/ExpandMemCmp.h" #include "llvm/CodeGen/ExpandPostRAPseudos.h" #include "llvm/CodeGen/ExpandReductions.h" @@ -677,7 +677,7 @@ void CodeGenPassBuilder<Derived, TargetMachineT>::addISelPasses( addModulePass(LowerEmuTLSPass(), PMW); addModulePass(PreISelIntrinsicLoweringPass(&TM), PMW); - addFunctionPass(ExpandFpPass(TM, getOptLevel()), PMW); + addFunctionPass(ExpandIRInstsPass(TM, getOptLevel()), PMW); derived().addIRPasses(PMW); derived().addCodeGenPrepare(PMW); diff --git a/llvm/lib/CodeGen/CMakeLists.txt b/llvm/lib/CodeGen/CMakeLists.txt index 8c9b172c0da65..871934ea4b76e 100644 --- a/llvm/lib/CodeGen/CMakeLists.txt +++ b/llvm/lib/CodeGen/CMakeLists.txt @@ -57,7 +57,7 @@ add_llvm_component_library(LLVMCodeGen EdgeBundles.cpp EHContGuardTargets.cpp ExecutionDomainFix.cpp - ExpandFp.cpp + ExpandIRInsts.cpp ExpandMemCmp.cpp ExpandPostRAPseudos.cpp ExpandReductions.cpp diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp index 47633f89b70e9..3550eea13979a 100644 --- a/llvm/lib/CodeGen/CodeGen.cpp +++ b/llvm/lib/CodeGen/CodeGen.cpp @@ -39,7 +39,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) { initializeEarlyIfPredicatorPass(Registry); initializeEarlyMachineLICMPass(Registry); initializeEarlyTailDuplicateLegacyPass(Registry); - initializeExpandFpLegacyPassPass(Registry); + initializeExpandIRInstsLegacyPassPass(Registry); initializeExpandMemCmpLegacyPassPass(Registry); initializeExpandPostRALegacyPass(Registry); initializeFEntryInserterLegacyPass(Registry); diff --git a/llvm/lib/CodeGen/ExpandFp.cpp b/llvm/lib/CodeGen/ExpandIRInsts.cpp similarity index 95% rename from llvm/lib/CodeGen/ExpandFp.cpp rename to llvm/lib/CodeGen/ExpandIRInsts.cpp index 395fef19a13b9..716cac20b7e60 100644 --- a/llvm/lib/CodeGen/ExpandFp.cpp +++ b/llvm/lib/CodeGen/ExpandIRInsts.cpp @@ -1,26 +1,33 @@ -//===--- ExpandFp.cpp - Expand fp instructions ----------------------------===// +//===--- ExpandIRInsts.cpp - Expand IR instructions -----------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// -// This pass expands certain floating point instructions at the IR level. +// This pass expands certain instructions at the IR level. // -// It expands ‘fptoui .. to’, ‘fptosi .. to’, ‘uitofp .. to’, ‘sitofp +// The following expansions are implemented: +// - Expansion of ‘fptoui .. to’, ‘fptosi .. to’, ‘uitofp .. to’, ‘sitofp // .. to’ instructions with a bitwidth above a threshold. This is // useful for targets like x86_64 that cannot lower fp convertions // with more than 128 bits. // -// This pass also expands div/rem instructions with a bitwidth above a -// threshold into a call to auto-generated functions. This is useful -// for targets like x86_64 that cannot lower divisions with more than -// 128 bits or targets like x86_32 that cannot lower divisions with -// more than 64 bits. +// - Expansion of ‘frem‘ for types MVT::f16, MVT::f32, and MVT::f64 for +// targets which use "Expand" as the legalization action for the +// corresponding type. // +// - Expansion of ‘udiv‘, ‘sdiv‘, ‘urem‘, and ‘srem‘ instructions with +// a bitwidth above a threshold into a call to auto-generated +// functions. This is useful for targets like x86_64 that cannot +// lower divisions with more than 128 bits or targets like x86_32 that +// cannot lower divisions with more than 64 bits. +// +// Instructions with vector types are scalarized first if their scalar +// types can be expanded. Scalable vector types are not supported. //===----------------------------------------------------------------------===// -#include "llvm/CodeGen/ExpandFp.h" +#include "llvm/CodeGen/ExpandIRInsts.h" #include "llvm/ADT/SmallVector.h" #include "llvm/Analysis/AssumptionCache.h" #include "llvm/Analysis/GlobalsModRef.h" @@ -45,15 +52,15 @@ #include <llvm/Support/Casting.h> #include <optional> -#define DEBUG_TYPE "expand-fp" +#define DEBUG_TYPE "expand-ir-insts" using namespace llvm; -static cl::opt<unsigned> - ExpandFpConvertBits("expand-fp-convert-bits", cl::Hidden, - cl::init(llvm::IntegerType::MAX_INT_BITS), - cl::desc("fp convert instructions on integers with " - "more than <N> bits are expanded.")); +static cl::opt<unsigned> ExpandIRInstsConvertBits( + "expand-fp-convert-bits", cl::Hidden, + cl::init(llvm::IntegerType::MAX_INT_BITS), + cl::desc("fp convert instructions on integers with " + "more than <N> bits are expanded.")); static cl::opt<unsigned> ExpandDivRemBits("expand-div-rem-bits", cl::Hidden, @@ -1021,8 +1028,8 @@ static bool runImpl(Function &F, const TargetLowering &TLI, unsigned MaxLegalFpConvertBitWidth = TLI.getMaxLargeFPConvertBitWidthSupported(); - if (ExpandFpConvertBits != llvm::IntegerType::MAX_INT_BITS) - MaxLegalFpConvertBitWidth = ExpandFpConvertBits; + if (ExpandIRInstsConvertBits != llvm::IntegerType::MAX_INT_BITS) + MaxLegalFpConvertBitWidth = ExpandIRInstsConvertBits; unsigned MaxLegalDivRemBitWidth = TLI.getMaxDivRemBitWidthSupported(); if (ExpandDivRemBits != llvm::IntegerType::MAX_INT_BITS) @@ -1125,18 +1132,18 @@ static bool runImpl(Function &F, const TargetLowering &TLI, } namespace { -class ExpandFpLegacyPass : public FunctionPass { +class ExpandIRInstsLegacyPass : public FunctionPass { CodeGenOptLevel OptLevel; public: static char ID; - ExpandFpLegacyPass(CodeGenOptLevel OptLevel) + ExpandIRInstsLegacyPass(CodeGenOptLevel OptLevel) : FunctionPass(ID), OptLevel(OptLevel) { - initializeExpandFpLegacyPassPass(*PassRegistry::getPassRegistry()); + initializeExpandIRInstsLegacyPassPass(*PassRegistry::getPassRegistry()); } - ExpandFpLegacyPass() : ExpandFpLegacyPass(CodeGenOptLevel::None) {}; + ExpandIRInstsLegacyPass() : ExpandIRInstsLegacyPass(CodeGenOptLevel::None) {}; bool runOnFunction(Function &F) override { auto *TM = &getAnalysis<TargetPassConfig>().getTM<TargetMachine>(); @@ -1165,19 +1172,21 @@ class ExpandFpLegacyPass : public FunctionPass { }; } // namespace -ExpandFpPass::ExpandFpPass(const TargetMachine &TM, CodeGenOptLevel OptLevel) +ExpandIRInstsPass::ExpandIRInstsPass(const TargetMachine &TM, + CodeGenOptLevel OptLevel) : TM(&TM), OptLevel(OptLevel) {} -void ExpandFpPass::printPipeline( +void ExpandIRInstsPass::printPipeline( raw_ostream &OS, function_ref<StringRef(StringRef)> MapClassName2PassName) { - static_cast<PassInfoMixin<ExpandFpPass> *>(this)->printPipeline( + static_cast<PassInfoMixin<ExpandIRInstsPass> *>(this)->printPipeline( OS, MapClassName2PassName); OS << '<'; OS << "O" << (int)OptLevel; OS << '>'; } -PreservedAnalyses ExpandFpPass::run(Function &F, FunctionAnalysisManager &FAM) { +PreservedAnalyses ExpandIRInstsPass::run(Function &F, + FunctionAnalysisManager &FAM) { const TargetSubtargetInfo *STI = TM->getSubtargetImpl(F); auto &TLI = *STI->getTargetLowering(); AssumptionCache *AC = nullptr; @@ -1202,12 +1211,13 @@ PreservedAnalyses ExpandFpPass::run(Function &F, FunctionAnalysisManager &FAM) { : PreservedAnalyses::all(); } -char ExpandFpLegacyPass::ID = 0; -INITIALIZE_PASS_BEGIN(ExpandFpLegacyPass, "expand-fp", +char ExpandIRInstsLegacyPass::ID = 0; +INITIALIZE_PASS_BEGIN(ExpandIRInstsLegacyPass, "expand-ir-insts", "Expand certain fp instructions", false, false) INITIALIZE_PASS_DEPENDENCY(LibcallLoweringInfoWrapper) -INITIALIZE_PASS_END(ExpandFpLegacyPass, "expand-fp", "Expand fp", false, false) +INITIALIZE_PASS_END(ExpandIRInstsLegacyPass, "expand-ir-insts", + "Expand IR instructions", false, false) -FunctionPass *llvm::createExpandFpPass(CodeGenOptLevel OptLevel) { - return new ExpandFpLegacyPass(OptLevel); +FunctionPass *llvm::createExpandIRInstsPass(CodeGenOptLevel OptLevel) { + return new ExpandIRInstsLegacyPass(OptLevel); } diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp index acceb66468409..ca75d3b47cf3a 100644 --- a/llvm/lib/CodeGen/TargetPassConfig.cpp +++ b/llvm/lib/CodeGen/TargetPassConfig.cpp @@ -1090,7 +1090,7 @@ bool TargetPassConfig::addISelPasses() { PM->add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis())); addPass(createPreISelIntrinsicLoweringPass()); - addPass(createExpandFpPass(getOptLevel())); + addPass(createExpandIRInstsPass(getOptLevel())); addIRPasses(); addCodeGenPrepare(); addPassesToHandleExceptions(); diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp index d639c24664ad1..84ee043b5da56 100644 --- a/llvm/lib/Passes/PassBuilder.cpp +++ b/llvm/lib/Passes/PassBuilder.cpp @@ -91,7 +91,7 @@ #include "llvm/CodeGen/DwarfEHPrepare.h" #include "llvm/CodeGen/EarlyIfConversion.h" #include "llvm/CodeGen/EdgeBundles.h" -#include "llvm/CodeGen/ExpandFp.h" +#include "llvm/CodeGen/ExpandIRInsts.h" #include "llvm/CodeGen/ExpandMemCmp.h" #include "llvm/CodeGen/ExpandPostRAPseudos.h" #include "llvm/CodeGen/ExpandReductions.h" @@ -1632,7 +1632,7 @@ parseBoundsCheckingOptions(StringRef Params) { return Options; } -Expected<CodeGenOptLevel> parseExpandFpOptions(StringRef Param) { +Expected<CodeGenOptLevel> parseExpandIRInstsOptions(StringRef Param) { if (Param.empty()) return CodeGenOptLevel::None; @@ -1641,13 +1641,13 @@ Expected<CodeGenOptLevel> parseExpandFpOptions(StringRef Param) { uint8_t N; if (!Prefix.empty() || Digit.getAsInteger(10, N)) - return createStringError("invalid expand-fp pass parameter '%s'", + return createStringError("invalid expand-ir-insts pass parameter '%s'", Param.str().c_str()); std::optional<CodeGenOptLevel> Level = CodeGenOpt::getLevel(N); if (!Level.has_value()) return createStringError( - "invalid optimization level for expand-fp pass: %s", + "invalid optimization level for expand-ir-insts pass: %s", Digit.str().c_str()); return *Level; diff --git a/llvm/lib/Passes/PassRegistry.def b/llvm/lib/Passes/PassRegistry.def index 14215bb32e777..daf6b3d6dbd28 100644 --- a/llvm/lib/Passes/PassRegistry.def +++ b/llvm/lib/Passes/PassRegistry.def @@ -729,11 +729,11 @@ FUNCTION_PASS_WITH_PARAMS( parseBoundsCheckingOptions, "trap;rt;rt-abort;min-rt;min-rt-abort;merge;guard=N") FUNCTION_PASS_WITH_PARAMS( - "expand-fp", "ExpandFpPass", + "expand-ir-insts", "ExpandIRInstsPass", [TM = TM](CodeGenOptLevel OL) { - return ExpandFpPass(*TM, OL); + return ExpandIRInstsPass(*TM, OL); }, - parseExpandFpOptions, "O0;O1;O2;O3") + parseExpandIRInstsOptions, "O0;O1;O2;O3") #undef FUNCTION_PASS_WITH_PARAMS diff --git a/llvm/test/CodeGen/AArch64/O0-pipeline.ll b/llvm/test/CodeGen/AArch64/O0-pipeline.ll index 2a1264446c70d..f4f9d38336608 100644 --- a/llvm/test/CodeGen/AArch64/O0-pipeline.ll +++ b/llvm/test/CodeGen/AArch64/O0-pipeline.ll @@ -17,7 +17,7 @@ ; CHECK-NEXT: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: Module Verifier ; CHECK-NEXT: Lower Garbage Collection Instructions diff --git a/llvm/test/CodeGen/AArch64/O3-pipeline.ll b/llvm/test/CodeGen/AArch64/O3-pipeline.ll index 4dc3cd1d6b786..f6ed7d5eed814 100644 --- a/llvm/test/CodeGen/AArch64/O3-pipeline.ll +++ b/llvm/test/CodeGen/AArch64/O3-pipeline.ll @@ -21,7 +21,7 @@ ; CHECK-NEXT: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: SVE intrinsics optimizations ; CHECK-NEXT: FunctionPass Manager diff --git a/llvm/test/CodeGen/AMDGPU/dagcombine-select.ll b/llvm/test/CodeGen/AMDGPU/dagcombine-select.ll index 39365fe7b6f15..c828f0b538bec 100644 --- a/llvm/test/CodeGen/AMDGPU/dagcombine-select.ll +++ b/llvm/test/CodeGen/AMDGPU/dagcombine-select.ll @@ -579,8 +579,8 @@ define amdgpu_kernel void @fdiv_constant_sel_constants(ptr addrspace(1) %p, i1 % ret void } -; ExpandFp now expands frem before it reaches dagcombine. -; TODO Implement this optimization in/before ExpandFP +; ExpandIRInsts now expands frem before it reaches dagcombine. +; TODO Implement this optimization in/before ExpandIRInsts? define amdgpu_kernel void @frem_constant_sel_constants(ptr addrspace(1) %p, i1 %cond) { ; GFX9-LABEL: frem_constant_sel_constants: ; GFX9: ; %bb.0: diff --git a/llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll b/llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll index c001df48499c7..eee3352fa7452 100644 --- a/llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll +++ b/llvm/test/CodeGen/AMDGPU/itofp.i128.bf.ll @@ -2,7 +2,7 @@ ; RUN: llc -global-isel=0 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,SDAG %s ; RUN: not --crash llc -global-isel=1 -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 < %s 2>&1 | FileCheck -check-prefix=GISEL %s -; FIXME: GISEL can't handle the "fptrunc float to bfloat" that expand-fp emits. +; FIXME: GISEL can't handle the "fptrunc float to bfloat" that expand-ir-insts emits. ; GISEL: unable to translate instruction: fptrunc diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll index edf4b6f26d08e..61c751a9816a2 100644 --- a/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll +++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll @@ -9,11 +9,11 @@ ; RUN: | FileCheck -check-prefix=GCN-O3 %s -; GCN-O0: require<MachineModuleAnalysis>,require<profile-summary>,require<collector-metadata>,require<runtime-libcall-info>,pre-isel-intrinsic-lowering,function(expand-fp<O0>),amdgpu-remove-incompatible-functions,amdgpu-printf-runtime-binding,amdgpu-lower-ctor-dtor,function(amdgpu-uniform-intrinsic-combine),expand-variadics,amdgpu-always-inline,always-inline,amdgpu-export-kernel-runtime-handles,amdgpu-lower-exec-sync,amdgpu-sw-lower-lds,amdgpu-lower-module-lds,function(atomic-expand,verify,gc-lowering,lower-constant-intrinsics,unreachableblockelim,ee-instrument<post-inline>,scalarize-masked-mem-intrin,expand-reductions,amdgpu-lower-kernel-arguments),amdgpu-lower-buffer-fat-pointers,amdgpu-lower-intrinsics,cgscc(function(lower-switch,lower-invoke,unreachableblockelim)),require<amdgpu-argument-usage>,cgscc(function(amdgpu-unify-divergent-exit-nodes,fix-irreducible,unify-loop-exits,StructurizeCFGPass,amdgpu-annotate-uniform,si-annotate-control-flow,amdgpu-rewrite-undef-for-phi,lcssa,require<uniformity>,callbr-prepare,safe-stack,stack-protector,verify)),cgscc(function(machine-function(amdgpu-isel,si-fix-sgpr-copies,si-i1-copies,finalize-isel,localstackalloc))),require<reg-usage>,cgscc(function(machine-function(reg-usage-propagation,phi-node-elimination,two-address-instruction,regallocfast,si-fix-vgpr-copies,remove-redundant-debug-values,fixup-statepoint-caller-saved,prolog-epilog,post-ra-pseudos,si-post-ra-bundler,fentry-insert,xray-instrumentation,patchable-function,si-memory-legalizer,si-insert-waitcnts,si-mode-register,si-late-branch-lowering,post-RA-hazard-rec,amdgpu-wait-sgpr-hazards,amdgpu-lower-vgpr-encoding,branch-relaxation))),require<reg-usage>,cgscc(function(machine-function(reg-usage-collector,remove-loads-into-fake-uses,live-debug-values,machine-sanmd,stack-frame-layout,verify),free-machine-function)) +; GCN-O0: require<MachineModuleAnalysis>,require<profile-summary>,require<collector-metadata>,require<runtime-libcall-info>,pre-isel-intrinsic-lowering,function(expand-ir-insts<O0>),amdgpu-remove-incompatible-functions,amdgpu-printf-runtime-binding,amdgpu-lower-ctor-dtor,function(amdgpu-uniform-intrinsic-combine),expand-variadics,amdgpu-always-inline,always-inline,amdgpu-export-kernel-runtime-handles,amdgpu-lower-exec-sync,amdgpu-sw-lower-lds,amdgpu-lower-module-lds,function(atomic-expand,verify,gc-lowering,lower-constant-intrinsics,unreachableblockelim,ee-instrument<post-inline>,scalarize-masked-mem-intrin,expand-reductions,amdgpu-lower-kernel-arguments),amdgpu-lower-buffer-fat-pointers,amdgpu-lower-intrinsics,cgscc(function(lower-switch,lower-invoke,unreachableblockelim)),require<amdgpu-argument-usage>,cgscc(function(amdgpu-unify-divergent-exit-nodes,fix-irreducible,unify-loop-exits,StructurizeCFGPass,amdgpu-annotate-uniform,si-annotate-control-flow,amdgpu-rewrite-undef-for-phi,lcssa,require<uniformity>,callbr-prepare,safe-stack,stack-protector,verify)),cgscc(function(machine-function(amdgpu-isel,si-fix-sgpr-copies,si-i1-copies,finalize-isel,localstackalloc))),require<reg-usage>,cgscc(function(machine-function(reg-usage-propagation,phi-node-elimination,two-address-instruction,regallocfast,si-fix-vgpr-copies,remove-redundant-debug-values,fixup-statepoint-caller-saved,prolog-epilog,post-ra-pseudos,si-post-ra-bundler,fentry-insert,xray-instrumentation,patchable-function,si-memory-legalizer,si-insert-waitcnts,si-mode-register,si-late-branch-lowering,post-RA-hazard-rec,amdgpu-wait-sgpr-hazards,amdgpu-lower-vgpr-encoding,branch-relaxation))),require<reg-usage>,cgscc(function(machine-function(reg-usage-collector,remove-loads-into-fake-uses,live-debug-values,machine-sanmd,stack-frame-layout,verify),free-machine-function)) -; GCN-O2: require<MachineModuleAnalysis>,require<profile-summary>,require<collector-metadata>,require<runtime-libcall-info>,pre-isel-intrinsic-lowering,function(expand-fp<O2>),amdgpu-remove-incompatible-functions,amdgpu-printf-runtime-binding,amdgpu-lower-ctor-dtor,function(amdgpu-image-intrinsic-opt,amdgpu-uniform-intrinsic-combine),expand-variadics,amdgpu-always-inline,always-inline,amdgpu-export-kernel-runtime-handles,amdgpu-lower-exec-sync,amdgpu-sw-lower-lds,amdgpu-lower-module-lds,function(amdgpu-atomic-optimizer,atomic-expand,amdgpu-promote-alloca,separate-const-offset-from-gep<>,slsr,early-cse<>,nary-reassociate,early-cse<>,amdgpu-codegenprepare,loop-mssa(licm<allowspeculation>),verify,loop-mssa(canon-freeze,loop-reduce),mergeicmps,expand-memcmp,gc-lowering,lower-constant-intrinsics,unreachableblockelim,consthoist,replace-with-veclib,partially-inline-libcalls,ee-instrument<post-inline>,scalarize-masked-mem-intrin,expand-reductions,early-cse<>),amdgpu-preload-kernel-arguments,function(amdgpu-lower-kernel-arguments,codegenprepare,load-store-vectorizer),amdgpu-lower-buffer-fat-pointers,amdgpu-lower-intrinsics,cgscc(function(lower-switch,lower-invoke,unreachableblockelim)),require<amdgpu-argument-usage>,cgscc(function(flatten-cfg,sink,amdgpu-late-codegenprepare,amdgpu-unify-divergent-exit-nodes,fix-irreducible,unify-loop-exits,StructurizeCFGPass,amdgpu-annotate-uniform,si-annotate-control-flow,amdgpu-rewrite-undef-for-phi,lcssa)),amdgpu-perf-hint,cgscc(function(require<uniformity>,objc-arc-contract,callbr-prepare,safe-stack,stack-protector,verify)),cgscc(function(machine-function(amdgpu-isel,si-fix-sgpr-copies,si-i1-copies,finalize-isel,early-tailduplication,opt-phis,stack-coloring,localstackalloc,dead-mi-elimination,early-machinelicm,machine-cse,machine-sink,peephole-opt,dead-mi-elimination,si-fold-operands,gcn-dpp-combine,si-load-store-opt,si-peephole-sdwa,early-machinelicm,machine-cse,si-fold-operands,dead-mi-elimination,si-shrink-instructions))),require<reg-usage>,cgscc(function(machine-function(reg-usage-propagation,amdgpu-prepare-agpr-alloc,detect-dead-lanes,dead-mi-elimination,init-undef,process-imp-defs,unreachable-mbb-elimination,require<live-vars>,si-opt-vgpr-liverange,require<machine-loops>,phi-node-elimination,si-lower-control-flow,two-address-instruction,register-coalescer,rename-independent-subregs,amdgpu-rewrite-partial-reg-uses,machine-scheduler,amdgpu-pre-ra-optimizations,si-wqm,si-optimize-exec-masking-pre-ra,si-form-memory-clauses,amdgpu-pre-ra-long-branch-reg,greedy<sgpr>,virt-reg-rewriter<no-clear-vregs>,stack-slot-coloring,si-lower-sgpr-spills,si-pre-allocate-wwm-regs,greedy<wwm>,si-lower-wwm-copies,virt-reg-rewriter<no-clear-vregs>,amdgpu-reserve-wwm-regs,greedy<vgpr>,amdgpu-nsa-reassign,virt-reg-rewriter,amdgpu-mark-last-scratch-load,machine-cp,machinelicm,si-fix-vgpr-copies,si-optimize-exec-masking,remove-redundant-debug-values,fixup-statepoint-caller-saved,postra-machine-sink,shrink-wrap,prolog-epilog,branch-folder,tailduplication,machine-latecleanup,machine-cp,post-ra-pseudos,si-shrink-instructions,si-post-ra-bundler,postmisched,block-placement,fentry-insert,xray-instrumentation,patchable-function,gcn-create-vopd,si-memory-legalizer,si-insert-waitcnts,si-mode-register,si-insert-hard-clauses,si-late-branch-lowering,si-pre-emit-peephole,post-RA-hazard-rec,amdgpu-wait-sgpr-hazards,amdgpu-lower-vgpr-encoding,amdgpu-insert-delay-alu,branch-relaxation))),require<reg-usage>,cgscc(function(machine-function(reg-usage-collector,remove-loads-into-fake-uses,live-debug-values,machine-sanmd,stack-frame-layout,verify),free-machine-function)) +; GCN-O2: require<MachineModuleAnalysis>,require<profile-summary>,require<collector-metadata>,require<runtime-libcall-info>,pre-isel-intrinsic-lowering,function(expand-ir-insts<O2>),amdgpu-remove-incompatible-functions,amdgpu-printf-runtime-binding,amdgpu-lower-ctor-dtor,function(amdgpu-image-intrinsic-opt,amdgpu-uniform-intrinsic-combine),expand-variadics,amdgpu-always-inline,always-inline,amdgpu-export-kernel-runtime-handles,amdgpu-lower-exec-sync,amdgpu-sw-lower-lds,amdgpu-lower-module-lds,function(amdgpu-atomic-optimizer,atomic-expand,amdgpu-promote-alloca,separate-const-offset-from-gep<>,slsr,early-cse<>,nary-reassociate,early-cse<>,amdgpu-codegenprepare,loop-mssa(licm<allowspeculation>),verify,loop-mssa(canon-freeze,loop-reduce),mergeicmps,expand-memcmp,gc-lowering,lower-constant-intrinsics,unreachableblockelim,consthoist,replace-with-veclib,partially-inline-libcalls,ee-instrument<post-inline>,scalarize-masked-mem-intrin,expand-reductions,early-cse<>),amdgpu-preload-kernel-arguments,function(amdgpu-lower-kernel-arguments,codegenprepare,load-store-vectorizer),amdgpu-lower-buffer-fat-pointers,amdgpu-lower-intrinsics,cgscc(function(lower-switch,lower-invoke,unreachableblockelim)),require<amdgpu-argument-usage>,cgscc(function(flatten-cfg,sink,amdgpu-late-codegenprepare,amdgpu-unify-divergent-exit-nodes,fix-irreducible,unify-loop-exits,StructurizeCFGPass,amdgpu-annotate-uniform,si-annotate-control-flow,amdgpu-rewrite-undef-for-phi,lcssa)),amdgpu-perf-hint,cgscc(function(require<uniformity>,objc-arc-contract,callbr-prepare,safe-stack,stack-protector,verify)),cgscc(function(machine-function(amdgpu-isel,si-fix-sgpr-copies,si-i1-copies,finalize-isel,early-tailduplication,opt-phis,stack-coloring,localstackalloc,dead-mi-elimination,early-machinelicm,machine-cse,machine-sink,peephole-opt,dead-mi-elimination,si-fold-operands,gcn-dpp-combine,si-load-store-opt,si-peephole-sdwa,early-machinelicm,machine-cse,si-fold-operands,dead-mi-elimination,si-shrink-instructions))),require<reg-usage>,cgscc(function(machine-function(reg-usage-propagation,amdgpu-prepare-agpr-alloc,detect-dead-lanes,dead-mi-elimination,init-undef,process-imp-defs,unreachable-mbb-elimination,require<live-vars>,si-opt-vgpr-liverange,require<machine-loops>,phi-node-elimination,si-lower-control-flow,two-address-instruction,register-coalescer,rename-independent-subregs,amdgpu-rewrite-partial-reg-uses,machine-scheduler,amdgpu-pre-ra-optimizations,si-wqm,si-optimize-exec-masking-pre-ra,si-form-memory-clauses,amdgpu-pre-ra-long-branch-reg,greedy<sgpr>,virt-reg-rewriter<no-clear-vregs>,stack-slot-coloring,si-lower-sgpr-spills,si-pre-allocate-wwm-regs,greedy<wwm>,si-lower-wwm-copies,virt-reg-rewriter<no-clear-vregs>,amdgpu-reserve-wwm-regs,greedy<vgpr>,amdgpu-nsa-reassign,virt-reg-rewriter,amdgpu-mark-last-scratch-load,machine-cp,machinelicm,si-fix-vgpr-copies,si-optimize-exec-masking,remove-redundant-debug-values,fixup-statepoint-caller-saved,postra-machine-sink,shrink-wrap,prolog-epilog,branch-folder,tailduplication,machine-latecleanup,machine-cp,post-ra-pseudos,si-shrink-instructions,si-post-ra-bundler,postmisched,block-placement,fentry-insert,xray-instrumentation,patchable-function,gcn-create-vopd,si-memory-legalizer,si-insert-waitcnts,si-mode-register,si-insert-hard-clauses,si-late-branch-lowering,si-pre-emit-peephole,post-RA-hazard-rec,amdgpu-wait-sgpr-hazards,amdgpu-lower-vgpr-encoding,amdgpu-insert-delay-alu,branch-relaxation))),require<reg-usage>,cgscc(function(machine-function(reg-usage-collector,remove-loads-into-fake-uses,live-debug-values,machine-sanmd,stack-frame-layout,verify),free-machine-function)) -; GCN-O3: require<MachineModuleAnalysis>,require<profile-summary>,require<collector-metadata>,require<runtime-libcall-info>,pre-isel-intrinsic-lowering,function(expand-fp<O3>),amdgpu-remove-incompatible-functions,amdgpu-printf-runtime-binding,amdgpu-lower-ctor-dtor,function(amdgpu-image-intrinsic-opt,amdgpu-uniform-intrinsic-combine),expand-variadics,amdgpu-always-inline,always-inline,amdgpu-export-kernel-runtime-handles,amdgpu-lower-exec-sync,amdgpu-sw-lower-lds,amdgpu-lower-module-lds,function(amdgpu-atomic-optimizer,atomic-expand,amdgpu-promote-alloca,separate-const-offset-from-gep<>,slsr,gvn<>,nary-reassociate,early-cse<>,amdgpu-codegenprepare,loop-mssa(licm<allowspeculation>),verify,loop-mssa(canon-freeze,loop-reduce),mergeicmps,expand-memcmp,gc-lowering,lower-constant-intrinsics,unreachableblockelim,consthoist,replace-with-veclib,partially-inline-libcalls,ee-instrument<post-inline>,scalarize-masked-mem-intrin,expand-reductions,gvn<>),amdgpu-preload-kernel-arguments,function(amdgpu-lower-kernel-arguments,codegenprepare,load-store-vectorizer),amdgpu-lower-buffer-fat-pointers,amdgpu-lower-intrinsics,cgscc(function(lower-switch,lower-invoke,unreachableblockelim)),require<amdgpu-argument-usage>,cgscc(function(flatten-cfg,sink,amdgpu-late-codegenprepare,amdgpu-unify-divergent-exit-nodes,fix-irreducible,unify-loop-exits,StructurizeCFGPass,amdgpu-annotate-uniform,si-annotate-control-flow,amdgpu-rewrite-undef-for-phi,lcssa)),amdgpu-perf-hint,cgscc(function(require<uniformity>,objc-arc-contract,callbr-prepare,safe-stack,stack-protector,verify)),cgscc(function(machine-function(amdgpu-isel,si-fix-sgpr-copies,si-i1-copies,finalize-isel,early-tailduplication,opt-phis,stack-coloring,localstackalloc,dead-mi-elimination,early-machinelicm,machine-cse,machine-sink,peephole-opt,dead-mi-elimination,si-fold-operands,gcn-dpp-combine,si-load-store-opt,si-peephole-sdwa,early-machinelicm,machine-cse,si-fold-operands,dead-mi-elimination,si-shrink-instructions))),require<reg-usage>,cgscc(function(machine-function(reg-usage-propagation,amdgpu-prepare-agpr-alloc,detect-dead-lanes,dead-mi-elimination,init-undef,process-imp-defs,unreachable-mbb-elimination,require<live-vars>,si-opt-vgpr-liverange,require<machine-loops>,phi-node-elimination,si-lower-control-flow,two-address-instruction,register-coalescer,rename-independent-subregs,amdgpu-rewrite-partial-reg-uses,machine-scheduler,amdgpu-pre-ra-optimizations,si-wqm,si-optimize-exec-masking-pre-ra,si-form-memory-clauses,amdgpu-pre-ra-long-branch-reg,greedy<sgpr>,virt-reg-rewriter<no-clear-vregs>,stack-slot-coloring,si-lower-sgpr-spills,si-pre-allocate-wwm-regs,greedy<wwm>,si-lower-wwm-copies,virt-reg-rewriter<no-clear-vregs>,amdgpu-reserve-wwm-regs,greedy<vgpr>,amdgpu-nsa-reassign,virt-reg-rewriter,amdgpu-mark-last-scratch-load,machine-cp,machinelicm,si-fix-vgpr-copies,si-optimize-exec-masking,remove-redundant-debug-values,fixup-statepoint-caller-saved,postra-machine-sink,shrink-wrap,prolog-epilog,branch-folder,tailduplication,machine-latecleanup,machine-cp,post-ra-pseudos,si-shrink-instructions,si-post-ra-bundler,postmisched,block-placement,fentry-insert,xray-instrumentation,patchable-function,gcn-create-vopd,si-memory-legalizer,si-insert-waitcnts,si-mode-register,si-insert-hard-clauses,si-late-branch-lowering,si-pre-emit-peephole,post-RA-hazard-rec,amdgpu-wait-sgpr-hazards,amdgpu-lower-vgpr-encoding,amdgpu-insert-delay-alu,branch-relaxation))),require<reg-usage>,cgscc(function(machine-function(reg-usage-collector,remove-loads-into-fake-uses,live-debug-values,machine-sanmd,stack-frame-layout,verify),free-machine-function)) +; GCN-O3: require<MachineModuleAnalysis>,require<profile-summary>,require<collector-metadata>,require<runtime-libcall-info>,pre-isel-intrinsic-lowering,function(expand-ir-insts<O3>),amdgpu-remove-incompatible-functions,amdgpu-printf-runtime-binding,amdgpu-lower-ctor-dtor,function(amdgpu-image-intrinsic-opt,amdgpu-uniform-intrinsic-combine),expand-variadics,amdgpu-always-inline,always-inline,amdgpu-export-kernel-runtime-handles,amdgpu-lower-exec-sync,amdgpu-sw-lower-lds,amdgpu-lower-module-lds,function(amdgpu-atomic-optimizer,atomic-expand,amdgpu-promote-alloca,separate-const-offset-from-gep<>,slsr,gvn<>,nary-reassociate,early-cse<>,amdgpu-codegenprepare,loop-mssa(licm<allowspeculation>),verify,loop-mssa(canon-freeze,loop-reduce),mergeicmps,expand-memcmp,gc-lowering,lower-constant-intrinsics,unreachableblockelim,consthoist,replace-with-veclib,partially-inline-libcalls,ee-instrument<post-inline>,scalarize-masked-mem-intrin,expand-reductions,gvn<>),amdgpu-preload-kernel-arguments,function(amdgpu-lower-kernel-arguments,codegenprepare,load-store-vectorizer),amdgpu-lower-buffer-fat-pointers,amdgpu-lower-intrinsics,cgscc(function(lower-switch,lower-invoke,unreachableblockelim)),require<amdgpu-argument-usage>,cgscc(function(flatten-cfg,sink,amdgpu-late-codegenprepare,amdgpu-unify-divergent-exit-nodes,fix-irreducible,unify-loop-exits,StructurizeCFGPass,amdgpu-annotate-uniform,si-annotate-control-flow,amdgpu-rewrite-undef-for-phi,lcssa)),amdgpu-perf-hint,cgscc(function(require<uniformity>,objc-arc-contract,callbr-prepare,safe-stack,stack-protector,verify)),cgscc(function(machine-function(amdgpu-isel,si-fix-sgpr-copies,si-i1-copies,finalize-isel,early-tailduplication,opt-phis,stack-coloring,localstackalloc,dead-mi-elimination,early-machinelicm,machine-cse,machine-sink,peephole-opt,dead-mi-elimination,si-fold-operands,gcn-dpp-combine,si-load-store-opt,si-peephole-sdwa,early-machinelicm,machine-cse,si-fold-operands,dead-mi-elimination,si-shrink-instructions))),require<reg-usage>,cgscc(function(machine-function(reg-usage-propagation,amdgpu-prepare-agpr-alloc,detect-dead-lanes,dead-mi-elimination,init-undef,process-imp-defs,unreachable-mbb-elimination,require<live-vars>,si-opt-vgpr-liverange,require<machine-loops>,phi-node-elimination,si-lower-control-flow,two-address-instruction,register-coalescer,rename-independent-subregs,amdgpu-rewrite-partial-reg-uses,machine-scheduler,amdgpu-pre-ra-optimizations,si-wqm,si-optimize-exec-masking-pre-ra,si-form-memory-clauses,amdgpu-pre-ra-long-branch-reg,greedy<sgpr>,virt-reg-rewriter<no-clear-vregs>,stack-slot-coloring,si-lower-sgpr-spills,si-pre-allocate-wwm-regs,greedy<wwm>,si-lower-wwm-copies,virt-reg-rewriter<no-clear-vregs>,amdgpu-reserve-wwm-regs,greedy<vgpr>,amdgpu-nsa-reassign,virt-reg-rewriter,amdgpu-mark-last-scratch-load,machine-cp,machinelicm,si-fix-vgpr-copies,si-optimize-exec-masking,remove-redundant-debug-values,fixup-statepoint-caller-saved,postra-machine-sink,shrink-wrap,prolog-epilog,branch-folder,tailduplication,machine-latecleanup,machine-cp,post-ra-pseudos,si-shrink-instructions,si-post-ra-bundler,postmisched,block-placement,fentry-insert,xray-instrumentation,patchable-function,gcn-create-vopd,si-memory-legalizer,si-insert-waitcnts,si-mode-register,si-insert-hard-clauses,si-late-branch-lowering,si-pre-emit-peephole,post-RA-hazard-rec,amdgpu-wait-sgpr-hazards,amdgpu-lower-vgpr-encoding,amdgpu-insert-delay-alu,branch-relaxation))),require<reg-usage>,cgscc(function(machine-function(reg-usage-collector,remove-loads-into-fake-uses,live-debug-values,machine-sanmd,stack-frame-layout,verify),free-machine-function)) define void @empty() { ret void diff --git a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll index d8fc0817c705b..6940c1b238e1d 100644 --- a/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll +++ b/llvm/test/CodeGen/AMDGPU/llc-pipeline.ll @@ -28,7 +28,7 @@ ; GCN-O0-NEXT: ModulePass Manager ; GCN-O0-NEXT: Pre-ISel Intrinsic Lowering ; GCN-O0-NEXT: FunctionPass Manager -; GCN-O0-NEXT: Expand fp +; GCN-O0-NEXT: Expand IR instructions ; GCN-O0-NEXT: AMDGPU Remove Incompatible Functions ; GCN-O0-NEXT: AMDGPU Printf lowering ; GCN-O0-NEXT: Lower ctors and dtors for AMDGPU @@ -182,7 +182,7 @@ ; GCN-O1-NEXT: ModulePass Manager ; GCN-O1-NEXT: Pre-ISel Intrinsic Lowering ; GCN-O1-NEXT: FunctionPass Manager -; GCN-O1-NEXT: Expand fp +; GCN-O1-NEXT: Expand IR instructions ; GCN-O1-NEXT: AMDGPU Remove Incompatible Functions ; GCN-O1-NEXT: AMDGPU Printf lowering ; GCN-O1-NEXT: Lower ctors and dtors for AMDGPU @@ -475,7 +475,7 @@ ; GCN-O1-OPTS-NEXT: ModulePass Manager ; GCN-O1-OPTS-NEXT: Pre-ISel Intrinsic Lowering ; GCN-O1-OPTS-NEXT: FunctionPass Manager -; GCN-O1-OPTS-NEXT: Expand fp +; GCN-O1-OPTS-NEXT: Expand IR instructions ; GCN-O1-OPTS-NEXT: AMDGPU Remove Incompatible Functions ; GCN-O1-OPTS-NEXT: AMDGPU Printf lowering ; GCN-O1-OPTS-NEXT: Lower ctors and dtors for AMDGPU @@ -796,7 +796,7 @@ ; GCN-O2-NEXT: ModulePass Manager ; GCN-O2-NEXT: Pre-ISel Intrinsic Lowering ; GCN-O2-NEXT: FunctionPass Manager -; GCN-O2-NEXT: Expand fp +; GCN-O2-NEXT: Expand IR instructions ; GCN-O2-NEXT: AMDGPU Remove Incompatible Functions ; GCN-O2-NEXT: AMDGPU Printf lowering ; GCN-O2-NEXT: Lower ctors and dtors for AMDGPU @@ -1122,7 +1122,7 @@ ; GCN-O3-NEXT: ModulePass Manager ; GCN-O3-NEXT: Pre-ISel Intrinsic Lowering ; GCN-O3-NEXT: FunctionPass Manager -; GCN-O3-NEXT: Expand fp +; GCN-O3-NEXT: Expand IR instructions ; GCN-O3-NEXT: AMDGPU Remove Incompatible Functions ; GCN-O3-NEXT: AMDGPU Printf lowering ; GCN-O3-NEXT: Lower ctors and dtors for AMDGPU diff --git a/llvm/test/CodeGen/ARM/O3-pipeline.ll b/llvm/test/CodeGen/ARM/O3-pipeline.ll index eb4a6a96d7125..e2da828aef955 100644 --- a/llvm/test/CodeGen/ARM/O3-pipeline.ll +++ b/llvm/test/CodeGen/ARM/O3-pipeline.ll @@ -5,7 +5,7 @@ ; CHECK: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: Simplify the CFG ; CHECK-NEXT: Dominator Tree Construction diff --git a/llvm/test/CodeGen/LoongArch/O0-pipeline.ll b/llvm/test/CodeGen/LoongArch/O0-pipeline.ll index 83e591733478d..ad7eee3f975f6 100644 --- a/llvm/test/CodeGen/LoongArch/O0-pipeline.ll +++ b/llvm/test/CodeGen/LoongArch/O0-pipeline.ll @@ -21,7 +21,7 @@ ; CHECK-NEXT: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: Module Verifier ; CHECK-NEXT: Lower Garbage Collection Instructions diff --git a/llvm/test/CodeGen/LoongArch/opt-pipeline.ll b/llvm/test/CodeGen/LoongArch/opt-pipeline.ll index edca771c21aa4..3087e6320cdd1 100644 --- a/llvm/test/CodeGen/LoongArch/opt-pipeline.ll +++ b/llvm/test/CodeGen/LoongArch/opt-pipeline.ll @@ -33,7 +33,7 @@ ; LAXX-NEXT: ModulePass Manager ; LAXX-NEXT: Pre-ISel Intrinsic Lowering ; LAXX-NEXT: FunctionPass Manager -; LAXX-NEXT: Expand fp +; LAXX-NEXT: Expand IR instructions ; LAXX-NEXT: Expand Atomic instructions ; LAXX-NEXT: Module Verifier ; LAXX-NEXT: Dominator Tree Construction diff --git a/llvm/test/CodeGen/M68k/pipeline.ll b/llvm/test/CodeGen/M68k/pipeline.ll index 9c9f64ba720cb..94de949a65791 100644 --- a/llvm/test/CodeGen/M68k/pipeline.ll +++ b/llvm/test/CodeGen/M68k/pipeline.ll @@ -2,7 +2,7 @@ ; CHECK: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: Module Verifier ; CHECK-NEXT: Dominator Tree Construction diff --git a/llvm/test/CodeGen/PowerPC/O0-pipeline.ll b/llvm/test/CodeGen/PowerPC/O0-pipeline.ll index 38af14aaf6c53..d586328c5062e 100644 --- a/llvm/test/CodeGen/PowerPC/O0-pipeline.ll +++ b/llvm/test/CodeGen/PowerPC/O0-pipeline.ll @@ -18,7 +18,7 @@ ; CHECK-NEXT: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: PPC Lower MASS Entries ; CHECK-NEXT: FunctionPass Manager diff --git a/llvm/test/CodeGen/PowerPC/O3-pipeline.ll b/llvm/test/CodeGen/PowerPC/O3-pipeline.ll index 81b700283af37..a49f007e19293 100644 --- a/llvm/test/CodeGen/PowerPC/O3-pipeline.ll +++ b/llvm/test/CodeGen/PowerPC/O3-pipeline.ll @@ -21,7 +21,7 @@ ; CHECK-NEXT: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Convert i1 constants to i32/i64 if they are returned ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: PPC Lower MASS Entries diff --git a/llvm/test/CodeGen/RISCV/O0-pipeline.ll b/llvm/test/CodeGen/RISCV/O0-pipeline.ll index 5452e0a62401f..c3e0ed9b85ec7 100644 --- a/llvm/test/CodeGen/RISCV/O0-pipeline.ll +++ b/llvm/test/CodeGen/RISCV/O0-pipeline.ll @@ -21,7 +21,7 @@ ; CHECK-NEXT: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: RISC-V Zacas ABI fix ; CHECK-NEXT: Module Verifier diff --git a/llvm/test/CodeGen/RISCV/O3-pipeline.ll b/llvm/test/CodeGen/RISCV/O3-pipeline.ll index a13f51f4d4c88..a88cf7912c81f 100644 --- a/llvm/test/CodeGen/RISCV/O3-pipeline.ll +++ b/llvm/test/CodeGen/RISCV/O3-pipeline.ll @@ -25,7 +25,7 @@ ; CHECK-NEXT: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: RISC-V Zacas ABI fix ; CHECK-NEXT: Dominator Tree Construction diff --git a/llvm/test/CodeGen/SPIRV/llc-pipeline.ll b/llvm/test/CodeGen/SPIRV/llc-pipeline.ll index cb229601bd9b6..aedd8e01e264e 100644 --- a/llvm/test/CodeGen/SPIRV/llc-pipeline.ll +++ b/llvm/test/CodeGen/SPIRV/llc-pipeline.ll @@ -23,7 +23,7 @@ ; SPIRV-O0-NEXT: ModulePass Manager ; SPIRV-O0-NEXT: Pre-ISel Intrinsic Lowering ; SPIRV-O0-NEXT: FunctionPass Manager -; SPIRV-O0-NEXT: Expand fp +; SPIRV-O0-NEXT: Expand IR instructions ; SPIRV-O0-NEXT: Lower Garbage Collection Instructions ; SPIRV-O0-NEXT: Shadow Stack GC Lowering ; SPIRV-O0-NEXT: Remove unreachable blocks from the CFG @@ -98,7 +98,7 @@ ; SPIRV-Opt-NEXT: ModulePass Manager ; SPIRV-Opt-NEXT: Pre-ISel Intrinsic Lowering ; SPIRV-Opt-NEXT: FunctionPass Manager -; SPIRV-Opt-NEXT: Expand fp +; SPIRV-Opt-NEXT: Expand IR instructions ; SPIRV-Opt-NEXT: Dominator Tree Construction ; SPIRV-Opt-NEXT: Basic Alias Analysis (stateless AA impl) ; SPIRV-Opt-NEXT: Natural Loop Information diff --git a/llvm/test/CodeGen/X86/O0-pipeline.ll b/llvm/test/CodeGen/X86/O0-pipeline.ll index 3bb6832b565c7..673b36968bdeb 100644 --- a/llvm/test/CodeGen/X86/O0-pipeline.ll +++ b/llvm/test/CodeGen/X86/O0-pipeline.ll @@ -19,7 +19,7 @@ ; CHECK-NEXT: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: Lower AMX intrinsics ; CHECK-NEXT: Lower AMX type for load/store diff --git a/llvm/test/CodeGen/X86/expand-large-fp-optnone.ll b/llvm/test/CodeGen/X86/expand-large-fp-optnone.ll index a155d125a6d12..cf155b3c3f1ac 100644 --- a/llvm/test/CodeGen/X86/expand-large-fp-optnone.ll +++ b/llvm/test/CodeGen/X86/expand-large-fp-optnone.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 ; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s -; expand-fp must also run with optnone +; expand-ir-insts must also run with optnone ; Function Attrs: noinline optnone define double @main(i224 %0) #0 { diff --git a/llvm/test/CodeGen/X86/opt-pipeline.ll b/llvm/test/CodeGen/X86/opt-pipeline.ll index 09dbe6e94c6c7..81b9670041de6 100644 --- a/llvm/test/CodeGen/X86/opt-pipeline.ll +++ b/llvm/test/CodeGen/X86/opt-pipeline.ll @@ -29,7 +29,7 @@ ; CHECK-NEXT: ModulePass Manager ; CHECK-NEXT: Pre-ISel Intrinsic Lowering ; CHECK-NEXT: FunctionPass Manager -; CHECK-NEXT: Expand fp +; CHECK-NEXT: Expand IR instructions ; CHECK-NEXT: Expand Atomic instructions ; CHECK-NEXT: Lower AMX intrinsics ; CHECK-NEXT: Lower AMX type for load/store diff --git a/llvm/test/Transforms/ExpandFp/AMDGPU/pass-parameters.ll b/llvm/test/Transforms/ExpandFp/AMDGPU/pass-parameters.ll deleted file mode 100644 index 794d5805291b0..0000000000000 --- a/llvm/test/Transforms/ExpandFp/AMDGPU/pass-parameters.ll +++ /dev/null @@ -1,20 +0,0 @@ -; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<O0>" %s -S -disable-output -; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<O1>" %s -S -disable-output -; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<O2>" %s -S -disable-output -; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<O3>" %s -S -disable-output - -; RUN: not opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<O4>" %s -S -disable-output 2>&1 | FileCheck --check-prefix=TOO-LARGE %s -; TOO-LARGE: {{.*}}invalid optimization level for expand-fp pass: 4 - -; RUN: not opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<Os>" %s -S -disable-output 2>&1 | FileCheck --check-prefix=NON-NUMERIC %s -; NON-NUMERIC: {{.*}}invalid expand-fp pass parameter - -; RUN: not opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<O-1>" %s -S -disable-output 2>&1 | FileCheck --check-prefix=NEGATIVE %s -; NEGATIVE: {{.*}}invalid expand-fp pass parameter 'O-1' - -; RUN: not opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<foo>" %s -S -disable-output 2>&1 | FileCheck --check-prefix=NO-O-PREFIX %s -; NO-O-PREFIX: {{.*}}invalid expand-fp pass parameter 'foo' - -define void @empty() { - ret void -} diff --git a/llvm/test/Transforms/ExpandFp/AMDGPU/frem-inf.ll b/llvm/test/Transforms/ExpandIRInsts/AMDGPU/frem-inf.ll similarity index 92% rename from llvm/test/Transforms/ExpandFp/AMDGPU/frem-inf.ll rename to llvm/test/Transforms/ExpandIRInsts/AMDGPU/frem-inf.ll index 54ece8d52f08a..a3e3e3d02eb07 100644 --- a/llvm/test/Transforms/ExpandFp/AMDGPU/frem-inf.ll +++ b/llvm/test/Transforms/ExpandIRInsts/AMDGPU/frem-inf.ll @@ -1,5 +1,5 @@ -; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<O0>" %s -S -o - | FileCheck --check-prefixes CHECK %s -; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<O1>" %s -S -o - | FileCheck --check-prefixes CHECK,OPT1 %s +; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<O0>" %s -S -o - | FileCheck --check-prefixes CHECK %s +; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<O1>" %s -S -o - | FileCheck --check-prefixes CHECK,OPT1 %s ; Check the handling of potentially infinite numerators in the frem ; expansion at different optimization levels and with different diff --git a/llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll b/llvm/test/Transforms/ExpandIRInsts/AMDGPU/frem.ll similarity index 99% rename from llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll rename to llvm/test/Transforms/ExpandIRInsts/AMDGPU/frem.ll index 5cd6f1e8a6086..a9d237bbf799a 100644 --- a/llvm/test/Transforms/ExpandFp/AMDGPU/frem.ll +++ b/llvm/test/Transforms/ExpandIRInsts/AMDGPU/frem.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 -; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-fp<O1>" %s -S -o - | FileCheck %s +; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<O1>" %s -S -o - | FileCheck %s define amdgpu_kernel void @frem_f16(ptr addrspace(1) %out, ptr addrspace(1) %in1, ; CHECK-LABEL: define amdgpu_kernel void @frem_f16( diff --git a/llvm/test/Transforms/ExpandFp/AMDGPU/lit.local.cfg b/llvm/test/Transforms/ExpandIRInsts/AMDGPU/lit.local.cfg similarity index 100% rename from llvm/test/Transforms/ExpandFp/AMDGPU/lit.local.cfg rename to llvm/test/Transforms/ExpandIRInsts/AMDGPU/lit.local.cfg diff --git a/llvm/test/Transforms/ExpandFp/AMDGPU/missing-analysis.ll b/llvm/test/Transforms/ExpandIRInsts/AMDGPU/missing-analysis.ll similarity index 50% rename from llvm/test/Transforms/ExpandFp/AMDGPU/missing-analysis.ll rename to llvm/test/Transforms/ExpandIRInsts/AMDGPU/missing-analysis.ll index 2d5f2a7223e3a..bb16fd992010c 100644 --- a/llvm/test/Transforms/ExpandFp/AMDGPU/missing-analysis.ll +++ b/llvm/test/Transforms/ExpandIRInsts/AMDGPU/missing-analysis.ll @@ -1,4 +1,4 @@ -; RUN: not opt -mtriple=amdgcn -passes=expand-fp -disable-output %s 2>&1 | FileCheck %s +; RUN: not opt -mtriple=amdgcn -passes=expand-ir-insts -disable-output %s 2>&1 | FileCheck %s ; CHECK: 'LibcallLoweringModuleAnalysis' analysis required define void @empty() { diff --git a/llvm/test/Transforms/ExpandIRInsts/AMDGPU/pass-parameters.ll b/llvm/test/Transforms/ExpandIRInsts/AMDGPU/pass-parameters.ll new file mode 100644 index 0000000000000..a9fa1c8b83de1 --- /dev/null +++ b/llvm/test/Transforms/ExpandIRInsts/AMDGPU/pass-parameters.ll @@ -0,0 +1,20 @@ +; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<O0>" %s -S -disable-output +; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<O1>" %s -S -disable-output +; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<O2>" %s -S -disable-output +; RUN: opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<O3>" %s -S -disable-output + +; RUN: not opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<O4>" %s -S -disable-output 2>&1 | FileCheck --check-prefix=TOO-LARGE %s +; TOO-LARGE: {{.*}}invalid optimization level for expand-ir-insts pass: 4 + +; RUN: not opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<Os>" %s -S -disable-output 2>&1 | FileCheck --check-prefix=NON-NUMERIC %s +; NON-NUMERIC: {{.*}}invalid expand-ir-insts pass parameter + +; RUN: not opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<O-1>" %s -S -disable-output 2>&1 | FileCheck --check-prefix=NEGATIVE %s +; NEGATIVE: {{.*}}invalid expand-ir-insts pass parameter 'O-1' + +; RUN: not opt -mtriple=amdgcn -passes="require<libcall-lowering-info>,expand-ir-insts<foo>" %s -S -disable-output 2>&1 | FileCheck --check-prefix=NO-O-PREFIX %s +; NO-O-PREFIX: {{.*}}invalid expand-ir-insts pass parameter 'foo' + +define void @empty() { + ret void +} diff --git a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptosi129.ll b/llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fptosi129.ll similarity index 99% rename from llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptosi129.ll rename to llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fptosi129.ll index 0cf8829aec037..d3a77de057ef5 100644 --- a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptosi129.ll +++ b/llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fptosi129.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -mtriple=x86_64-- --expand-fp < %s | FileCheck %s -; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-fp' < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- --expand-ir-insts < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-ir-insts' < %s | FileCheck %s define i129 @halftosi129(half %a) { ; CHECK-LABEL: @halftosi129( diff --git a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptoui129.ll b/llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fptoui129.ll similarity index 99% rename from llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptoui129.ll rename to llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fptoui129.ll index 055e3e0dc261d..07de91d404988 100644 --- a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptoui129.ll +++ b/llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fptoui129.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -mtriple=x86_64-- --expand-fp < %s | FileCheck %s -; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-fp' < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- --expand-ir-insts < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-ir-insts' < %s | FileCheck %s define i129 @halftoui129(half %a) { ; CHECK-LABEL: @halftoui129( diff --git a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-si129tofp.ll b/llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-si129tofp.ll similarity index 99% rename from llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-si129tofp.ll rename to llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-si129tofp.ll index 9bfd32e90b3cf..fab6e431872e7 100644 --- a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-si129tofp.ll +++ b/llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-si129tofp.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -mtriple=x86_64-- --expand-fp < %s | FileCheck %s -; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-fp' < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- --expand-ir-insts < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-ir-insts' < %s | FileCheck %s define half @si129tohalf(i129 %a) { ; CHECK-LABEL: @si129tohalf( diff --git a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-ui129tofp.ll b/llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-ui129tofp.ll similarity index 99% rename from llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-ui129tofp.ll rename to llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-ui129tofp.ll index 59fd2a49e622a..3a3a8e40ea8d1 100644 --- a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-ui129tofp.ll +++ b/llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-convert-ui129tofp.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -mtriple=x86_64-- --expand-fp < %s | FileCheck %s -; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-fp' < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- --expand-ir-insts < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-ir-insts' < %s | FileCheck %s define half @ui129tohalf(i129 %a) { ; CHECK-LABEL: @ui129tohalf( diff --git a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-optnone.ll b/llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-optnone.ll similarity index 97% rename from llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-optnone.ll rename to llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-optnone.ll index e78eaeb70fbf1..5b622c1ad77eb 100644 --- a/llvm/test/Transforms/ExpandLargeFpConvert/X86/expand-large-fp-optnone.ll +++ b/llvm/test/Transforms/ExpandIRInsts/X86/expand-large-fp-optnone.ll @@ -1,8 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 -; RUN: opt -S -mtriple=x86_64-- --expand-fp < %s | FileCheck %s -; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-fp' < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- --expand-ir-insts < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-ir-insts' < %s | FileCheck %s -; expand-fp must also run with optnone +; expand-ir-insts must also run with optnone ; Function Attrs: noinline optnone define double @main(i224 %0) #0 { diff --git a/llvm/test/Transforms/ExpandLargeDivRem/X86/lit.local.cfg b/llvm/test/Transforms/ExpandIRInsts/X86/lit.local.cfg similarity index 100% rename from llvm/test/Transforms/ExpandLargeDivRem/X86/lit.local.cfg rename to llvm/test/Transforms/ExpandIRInsts/X86/lit.local.cfg diff --git a/llvm/test/Transforms/ExpandLargeDivRem/X86/sdiv129.ll b/llvm/test/Transforms/ExpandIRInsts/X86/sdiv129.ll similarity index 96% rename from llvm/test/Transforms/ExpandLargeDivRem/X86/sdiv129.ll rename to llvm/test/Transforms/ExpandIRInsts/X86/sdiv129.ll index bca76b7b1a287..fc823cd543144 100644 --- a/llvm/test/Transforms/ExpandLargeDivRem/X86/sdiv129.ll +++ b/llvm/test/Transforms/ExpandIRInsts/X86/sdiv129.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -mtriple=x86_64-- -expand-fp -expand-div-rem-bits 128 < %s | FileCheck %s -; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-fp' -expand-div-rem-bits 128 < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -expand-ir-insts -expand-div-rem-bits 128 < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-ir-insts' -expand-div-rem-bits 128 < %s | FileCheck %s define void @sdiv129(ptr %ptr, ptr %out) nounwind { ; CHECK-LABEL: @sdiv129( diff --git a/llvm/test/Transforms/ExpandLargeDivRem/X86/srem129.ll b/llvm/test/Transforms/ExpandIRInsts/X86/srem129.ll similarity index 96% rename from llvm/test/Transforms/ExpandLargeDivRem/X86/srem129.ll rename to llvm/test/Transforms/ExpandIRInsts/X86/srem129.ll index 84e3129e4804b..667152228d258 100644 --- a/llvm/test/Transforms/ExpandLargeDivRem/X86/srem129.ll +++ b/llvm/test/Transforms/ExpandIRInsts/X86/srem129.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -mtriple=x86_64-- -expand-fp -expand-div-rem-bits 128 < %s | FileCheck %s -; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-fp' -expand-div-rem-bits 128 < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -expand-ir-insts -expand-div-rem-bits 128 < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-ir-insts' -expand-div-rem-bits 128 < %s | FileCheck %s define void @test(ptr %ptr, ptr %out) nounwind { ; CHECK-LABEL: @test( diff --git a/llvm/test/Transforms/ExpandLargeDivRem/X86/udiv129.ll b/llvm/test/Transforms/ExpandIRInsts/X86/udiv129.ll similarity index 95% rename from llvm/test/Transforms/ExpandLargeDivRem/X86/udiv129.ll rename to llvm/test/Transforms/ExpandIRInsts/X86/udiv129.ll index 0df910ba11a64..b2b83815f79b0 100644 --- a/llvm/test/Transforms/ExpandLargeDivRem/X86/udiv129.ll +++ b/llvm/test/Transforms/ExpandIRInsts/X86/udiv129.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -mtriple=x86_64-- -expand-fp -expand-div-rem-bits 128 < %s | FileCheck %s -; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-fp' -expand-div-rem-bits 128 < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -expand-ir-insts -expand-div-rem-bits 128 < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-ir-insts' -expand-div-rem-bits 128 < %s | FileCheck %s define void @test(ptr %ptr, ptr %out) nounwind { ; CHECK-LABEL: @test( diff --git a/llvm/test/Transforms/ExpandLargeDivRem/X86/urem129.ll b/llvm/test/Transforms/ExpandIRInsts/X86/urem129.ll similarity index 96% rename from llvm/test/Transforms/ExpandLargeDivRem/X86/urem129.ll rename to llvm/test/Transforms/ExpandIRInsts/X86/urem129.ll index c5dc3daa10242..46e72001b2c2d 100644 --- a/llvm/test/Transforms/ExpandLargeDivRem/X86/urem129.ll +++ b/llvm/test/Transforms/ExpandIRInsts/X86/urem129.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py -; RUN: opt -S -mtriple=x86_64-- -expand-fp -expand-div-rem-bits 128 < %s | FileCheck %s -; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-fp' -expand-div-rem-bits 128 < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -expand-ir-insts -expand-div-rem-bits 128 < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-ir-insts' -expand-div-rem-bits 128 < %s | FileCheck %s define void @test(ptr %ptr, ptr %out) nounwind { ; CHECK-LABEL: @test( diff --git a/llvm/test/Transforms/ExpandLargeDivRem/X86/vector.ll b/llvm/test/Transforms/ExpandIRInsts/X86/vector.ll similarity index 99% rename from llvm/test/Transforms/ExpandLargeDivRem/X86/vector.ll rename to llvm/test/Transforms/ExpandIRInsts/X86/vector.ll index 5ca801c1999be..58e74b8d17b55 100644 --- a/llvm/test/Transforms/ExpandLargeDivRem/X86/vector.ll +++ b/llvm/test/Transforms/ExpandIRInsts/X86/vector.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 -; RUN: opt -S -mtriple=x86_64-- -expand-fp -expand-div-rem-bits 128 < %s | FileCheck %s -; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-fp' -expand-div-rem-bits 128 < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -expand-ir-insts -expand-div-rem-bits 128 < %s | FileCheck %s +; RUN: opt -S -mtriple=x86_64-- -passes='require<libcall-lowering-info>,expand-ir-insts' -expand-div-rem-bits 128 < %s | FileCheck %s define <2 x i129> @sdiv129(<2 x i129> %a, <2 x i129> %b) nounwind { ; CHECK-LABEL: define <2 x i129> @sdiv129( diff --git a/llvm/test/Transforms/ExpandLargeFpConvert/X86/lit.local.cfg b/llvm/test/Transforms/ExpandLargeFpConvert/X86/lit.local.cfg deleted file mode 100644 index 42bf50dcc13c3..0000000000000 --- a/llvm/test/Transforms/ExpandLargeFpConvert/X86/lit.local.cfg +++ /dev/null @@ -1,2 +0,0 @@ -if not "X86" in config.root.targets: - config.unsupported = True diff --git a/llvm/test/tools/opt/no-target-machine.ll b/llvm/test/tools/opt/no-target-machine.ll index d718b80e26e57..89e2f26c9c652 100644 --- a/llvm/test/tools/opt/no-target-machine.ll +++ b/llvm/test/tools/opt/no-target-machine.ll @@ -3,7 +3,7 @@ ; RUN: not opt -passes=codegenprepare -disable-output %s 2>&1 | FileCheck %s ; RUN: not opt -passes=complex-deinterleaving -disable-output %s 2>&1 | FileCheck %s ; RUN: not opt -passes=dwarf-eh-prepare -disable-output %s 2>&1 | FileCheck %s -; RUN: not opt -passes=expand-fp -disable-output %s 2>&1 | FileCheck %s +; RUN: not opt -passes=expand-ir-insts -disable-output %s 2>&1 | FileCheck %s ; RUN: not opt -passes=expand-memcmp -disable-output %s 2>&1 | FileCheck %s ; RUN: not opt -passes=indirectbr-expand -disable-output %s 2>&1 | FileCheck %s ; RUN: not opt -passes=interleaved-access -disable-output %s 2>&1 | FileCheck %s @@ -12,7 +12,7 @@ ; RUN: not opt -passes=select-optimize -disable-output %s 2>&1 | FileCheck %s ; RUN: not opt -passes=stack-protector -disable-output %s 2>&1 | FileCheck %s ; RUN: not opt -passes=typepromotion -disable-output %s 2>&1 | FileCheck %s -; RUN: not opt -passes='expand-fp<O1>' -disable-output %s 2>&1 | FileCheck %s +; RUN: not opt -passes='expand-ir-insts<O1>' -disable-output %s 2>&1 | FileCheck %s define void @foo() { ret void } ; CHECK: pass '{{.+}}' requires TargetMachine ;requires TargetMachine diff --git a/llvm/tools/opt/optdriver.cpp b/llvm/tools/opt/optdriver.cpp index 689bb66f3bd7f..e8fd5befa1d1d 100644 --- a/llvm/tools/opt/optdriver.cpp +++ b/llvm/tools/opt/optdriver.cpp @@ -377,7 +377,7 @@ static bool shouldPinPassToLegacyPM(StringRef Pass) { "select-optimize", "structurizecfg", "fix-irreducible", - "expand-fp", + "expand-ir-insts", "callbrprepare", "scalarizer", }; @@ -428,7 +428,7 @@ optMain(int argc, char **argv, initializeTarget(Registry); // For codegen passes, only passes that do IR to IR transformation are // supported. - initializeExpandFpLegacyPassPass(Registry); + initializeExpandIRInstsLegacyPassPass(Registry); initializeExpandMemCmpLegacyPassPass(Registry); initializeScalarizeMaskedMemIntrinLegacyPassPass(Registry); initializeSelectOptimizePass(Registry); diff --git a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn index 257664c5fb7ca..0d539e186469f 100644 --- a/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn @@ -57,7 +57,7 @@ static_library("CodeGen") { "EarlyIfConversion.cpp", "EdgeBundles.cpp", "ExecutionDomainFix.cpp", - "ExpandFp.cpp", + "ExpandIRInsts.cpp", "ExpandMemCmp.cpp", "ExpandPostRAPseudos.cpp", "ExpandReductions.cpp", diff --git a/llvm/utils/profcheck-xfail.txt b/llvm/utils/profcheck-xfail.txt index 86907df908930..1646257a3fd67 100644 --- a/llvm/utils/profcheck-xfail.txt +++ b/llvm/utils/profcheck-xfail.txt @@ -134,15 +134,15 @@ Transforms/CorrelatedValuePropagation/urem.ll Transforms/CrossDSOCFI/basic.ll Transforms/CrossDSOCFI/cfi_functions.ll Transforms/CrossDSOCFI/thumb.ll -Transforms/ExpandLargeDivRem/X86/sdiv129.ll -Transforms/ExpandLargeDivRem/X86/srem129.ll -Transforms/ExpandLargeDivRem/X86/udiv129.ll -Transforms/ExpandLargeDivRem/X86/urem129.ll -Transforms/ExpandLargeDivRem/X86/vector.ll -Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptosi129.ll -Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-fptoui129.ll -Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-si129tofp.ll -Transforms/ExpandLargeFpConvert/X86/expand-large-fp-convert-ui129tofp.ll +Transforms/ExpandIRInsts/X86/sdiv129.ll +Transforms/ExpandIRInsts/X86/srem129.ll +Transforms/ExpandIRInsts/X86/udiv129.ll +Transforms/ExpandIRInsts/X86/urem129.ll +Transforms/ExpandIRInsts/X86/vector.ll +Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fptosi129.ll +Transforms/ExpandIRInsts/X86/expand-large-fp-convert-fptoui129.ll +Transforms/ExpandIRInsts/X86/expand-large-fp-convert-si129tofp.ll +Transforms/ExpandIRInsts/X86/expand-large-fp-convert-ui129tofp.ll Transforms/FixIrreducible/basic.ll Transforms/FixIrreducible/bug45623.ll Transforms/FixIrreducible/callbr.ll _______________________________________________ llvm-branch-commits mailing list [email protected] https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
