[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (PR #143881)

[Matt Arsenault via llvm-branch-commits]

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@@ -544,7 +545,10 @@ class ThreeOpFragSDAG<SDPatternOperator op1, 
SDPatternOperator op2> : PatFrag<
   let PredicateCodeUsesOperands = 1;
 }
 
-class ThreeOpFrag<SDPatternOperator op1, SDPatternOperator op2> : 
ThreeOpFragSDAG<op1, op2> {
+// Matches (op2 (op1 x, y), z) if op1IsRight = 0 and
+// matches (op2 z, (op1, x, y)) if op1IsRight = 1.
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arsenm wrote:

You shouldn't need to explicitly commute the patterns, the pattern generator 
should do this for commutable nodes 

https://github.com/llvm/llvm-project/pull/143881
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