llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-sparc Author: Matt Arsenault (arsenm) <details> <summary>Changes</summary> --- Full diff: https://github.com/llvm/llvm-project/pull/147672.diff 2 Files Affected: - (modified) llvm/include/llvm/IR/RuntimeLibcalls.td (+16) - (modified) llvm/lib/Target/Sparc/SparcISelLowering.cpp (-13) ``````````diff diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.td b/llvm/include/llvm/IR/RuntimeLibcalls.td index 403d98912653d..1554a6b7697e2 100644 --- a/llvm/include/llvm/IR/RuntimeLibcalls.td +++ b/llvm/include/llvm/IR/RuntimeLibcalls.td @@ -1828,6 +1828,22 @@ def _Q_qtoull : RuntimeLibcallImpl<FPTOUINT_F128_I64>; def _Q_lltoq : RuntimeLibcallImpl<SINTTOFP_I64_F128>; def _Q_ulltoq : RuntimeLibcallImpl<UINTTOFP_I64_F128>; +def isSPARC : RuntimeLibcallPredicate<"TT.isSPARC()">; +def isSPARC32 : RuntimeLibcallPredicate<"TT.isSPARC32()">; +def isSPARC64 : RuntimeLibcallPredicate<"TT.isSPARC64()">; + +defvar SPARC64_MulDivCalls = [ + __mulsi3, __divsi3, __modsi3, __udivsi3, __umodsi3 +]; + +def SPARCSystemLibrary + : SystemRuntimeLibrary<isSPARC, + (add (sub DefaultLibcallImpls32, SPARC64_MulDivCalls), + sparc_umul, sparc_div, sparc_udiv, sparc_rem, sparc_urem, + LibcallImpls<(add _Q_qtoll, _Q_qtoull, _Q_lltoq, _Q_ulltoq), isSPARC32>, + LibcallImpls<(add SPARC64_MulDivCalls, Int128RTLibcalls), isSPARC64>) +>; + //===----------------------------------------------------------------------===// // Windows Runtime Libcalls //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp index 9487234561824..9b434d87c2676 100644 --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -1824,12 +1824,6 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM, setOperationAction(ISD::MULHS, MVT::i32, Expand); setOperationAction(ISD::MUL, MVT::i32, Expand); - setLibcallImpl(RTLIB::MUL_I32, RTLIB::sparc_umul); - setLibcallImpl(RTLIB::SDIV_I32, RTLIB::sparc_div); - setLibcallImpl(RTLIB::UDIV_I32, RTLIB::sparc_udiv); - setLibcallImpl(RTLIB::SREM_I32, RTLIB::sparc_rem); - setLibcallImpl(RTLIB::UREM_I32, RTLIB::sparc_urem); - if (Subtarget->useSoftMulDiv()) { // .umul works for both signed and unsigned setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand); @@ -1879,13 +1873,6 @@ SparcTargetLowering::SparcTargetLowering(const TargetMachine &TM, setOperationAction(ISD::STORE, MVT::f128, Custom); } - if (!Subtarget->is64Bit()) { - setLibcallImpl(RTLIB::FPTOSINT_F128_I64, RTLIB::_Q_qtoll); - setLibcallImpl(RTLIB::FPTOUINT_F128_I64, RTLIB::_Q_qtoull); - setLibcallImpl(RTLIB::SINTTOFP_I64_F128, RTLIB::_Q_lltoq); - setLibcallImpl(RTLIB::UINTTOFP_I64_F128, RTLIB::_Q_ulltoq); - } - if (Subtarget->hasHardQuad()) { setOperationAction(ISD::FADD, MVT::f128, Legal); setOperationAction(ISD::FSUB, MVT::f128, Legal); `````````` </details> https://github.com/llvm/llvm-project/pull/147672 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
