Author: Jim Lin Date: 2025-07-04T14:36:18+08:00 New Revision: 671870be913234f13dac8cb8d2f8e36240c59046
URL: https://github.com/llvm/llvm-project/commit/671870be913234f13dac8cb8d2f8e36240c59046 DIFF: https://github.com/llvm/llvm-project/commit/671870be913234f13dac8cb8d2f8e36240c59046.diff LOG: [RISCV] Fold funct7 into class for XAndesVBFHCvt instructions. NFC. Added: Modified: llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td Removed: ################################################################################ diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td b/llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td index c7aa8cd5162b3..6954a955af6e2 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td @@ -372,13 +372,13 @@ class NDSRVInstVD4DOT<bits<6> funct6, string opcodestr> let RVVConstraint = VMConstraint; } -class NDSRVInstVBFHCvt<bits<7> funct7, bits<5> vs1, string opcodestr> +class NDSRVInstVBFHCvt<bits<5> vs1, string opcodestr> : RVInst<(outs VR:$vd), (ins VR:$vs2, VMaskOp:$vm), opcodestr, "$vd, $vs2", [], InstFormatR> { bits<5> vs2; bits<5> vd; - let Inst{31-25} = funct7; + let Inst{31-25} = 0b0000000; let Inst{24-20} = vs2; let Inst{19-15} = vs1; let Inst{14-12} = 0b100; @@ -537,9 +537,9 @@ def NDS_SDGP : NDSRVInstSDGP<0b111, "nds.sdgp">; let Predicates = [HasVendorXAndesVBFHCvt], Constraints = "@earlyclobber $vd", mayRaiseFPException = true in { let RVVConstraint = VS2Constraint, DestEEW = EEWSEWx2 in -def NDS_VFWCVT_S_BF16 : NDSRVInstVBFHCvt<0b0000000, 0b00000, "nds.vfwcvt.s.bf16">; +def NDS_VFWCVT_S_BF16 : NDSRVInstVBFHCvt<0b00000, "nds.vfwcvt.s.bf16">; let Uses = [FRM, VL, VTYPE] in -def NDS_VFNCVT_BF16_S : NDSRVInstVBFHCvt<0b0000000, 0b00001, "nds.vfncvt.bf16.s">; +def NDS_VFNCVT_BF16_S : NDSRVInstVBFHCvt<0b00001, "nds.vfncvt.bf16.s">; } //===----------------------------------------------------------------------===// _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits