https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/123933
This cannot happen. Also simplify the LaneBitmask check from !none to any. >From b4f514fbeef789f95f7443aaa97ffb67eff1d5c9 Mon Sep 17 00:00:00 2001 From: Matt Arsenault <matthew.arsena...@amd.com> Date: Wed, 22 Jan 2025 18:51:26 +0700 Subject: [PATCH] PeepholeOpt: Remove null TargetRegisterInfo check This cannot happen. Also simplify the LaneBitmask check from !none to any. --- llvm/lib/CodeGen/PeepholeOptimizer.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/llvm/lib/CodeGen/PeepholeOptimizer.cpp b/llvm/lib/CodeGen/PeepholeOptimizer.cpp index d56f040cf421fd..5fc8f419e80a5d 100644 --- a/llvm/lib/CodeGen/PeepholeOptimizer.cpp +++ b/llvm/lib/CodeGen/PeepholeOptimizer.cpp @@ -2048,9 +2048,9 @@ ValueTrackerResult ValueTracker::getNextSourceFromInsertSubreg() { // Get the TRI and check if the inserted sub-register overlaps with the // sub-register we are tracking. const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo(); - if (!TRI || !(TRI->getSubRegIndexLaneMask(DefSubReg) & - TRI->getSubRegIndexLaneMask(InsertedReg.SubIdx)) - .none()) + if ((TRI->getSubRegIndexLaneMask(DefSubReg) & + TRI->getSubRegIndexLaneMask(InsertedReg.SubIdx)) + .any()) return ValueTrackerResult(); // At this point, the value is available in v0 via the same subreg // we used for Def. _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits