llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT--> @llvm/pr-subscribers-backend-hexagon Author: None (llvmbot) <details> <summary>Changes</summary> Backport 8177bf5022c6dfc48d236082fa02076feedd60df Requested by: @<!-- -->androm3da --- Full diff: https://github.com/llvm/llvm-project/pull/121061.diff 2 Files Affected: - (modified) llvm/lib/Target/Hexagon/HexagonISelLowering.cpp (+4) - (added) llvm/test/CodeGen/Hexagon/simple-types-mem.ll (+22) ``````````diff diff --git a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp index 7aeaebc584c64c..995c5143e0a52a 100644 --- a/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp @@ -3796,6 +3796,8 @@ EVT HexagonTargetLowering::getOptimalMemOpType( bool HexagonTargetLowering::allowsMemoryAccess( LLVMContext &Context, const DataLayout &DL, EVT VT, unsigned AddrSpace, Align Alignment, MachineMemOperand::Flags Flags, unsigned *Fast) const { + if (!VT.isSimple()) + return false; MVT SVT = VT.getSimpleVT(); if (Subtarget.isHVXVectorType(SVT, true)) return allowsHvxMemoryAccess(SVT, Flags, Fast); @@ -3806,6 +3808,8 @@ bool HexagonTargetLowering::allowsMemoryAccess( bool HexagonTargetLowering::allowsMisalignedMemoryAccesses( EVT VT, unsigned AddrSpace, Align Alignment, MachineMemOperand::Flags Flags, unsigned *Fast) const { + if (!VT.isSimple()) + return false; MVT SVT = VT.getSimpleVT(); if (Subtarget.isHVXVectorType(SVT, true)) return allowsHvxMisalignedMemoryAccesses(SVT, Flags, Fast); diff --git a/llvm/test/CodeGen/Hexagon/simple-types-mem.ll b/llvm/test/CodeGen/Hexagon/simple-types-mem.ll new file mode 100644 index 00000000000000..01baa65a593531 --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/simple-types-mem.ll @@ -0,0 +1,22 @@ +; RUN: llc -march=hexagon < %s +; REQUIRES: asserts + +; Only simple types memory accesses are handled. + +target triple = "hexagon" + +%struct.hoge = type { i320 } + +define dso_local void @widget() { +bb: + %tmp = alloca %struct.hoge, align 1 + %tmp1 = bitcast %struct.hoge* %tmp to i320* + %tmp2 = load i320, i320* %tmp1, align 1 + %tmp3 = and i320 %tmp2, -18446744073709551616 + %tmp4 = or i320 %tmp3, 0 + store i320 %tmp4, i320* %tmp1, align 1 + call void @llvm.trap() + unreachable +} + +declare void @llvm.trap() `````````` </details> https://github.com/llvm/llvm-project/pull/121061 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
