[llvm-branch-commits] [llvm] [X86] Manage atomic load of fp -> int promotion in DAG (PR #120386)

[via llvm-branch-commits]

================
@@ -2595,6 +2595,10 @@ X86TargetLowering::X86TargetLowering(const 
X86TargetMachine &TM,
         setOperationAction(Op, MVT::f32, Promote);
   }
 
+  setOperationPromotedToType(ISD::ATOMIC_LOAD, MVT::f16, MVT::i16);
----------------
jofrn wrote:

`bf16` is already lowered properly without promotion.

And yes, other backends would either have to promote these here or implement 
them explicitly.

https://github.com/llvm/llvm-project/pull/120386
_______________________________________________
llvm-branch-commits mailing list
llvm-branch-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits