[llvm-branch-commits] [clang] [llvm] AMDGPU: Builtins & Codegen support for v_cvt_scale_fp4<->f32 for gfx950 (PR #117743)

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<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. 
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<summary>
You can test this locally with the following command:
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``````````bash
git-clang-format --diff a6099c680697a821a486d785ea36fa346d316a33 
f796dfddf398e9dc2f3cabd741267304f850edb7 --extensions cpp,h -- 
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h 
llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp 
llvm/lib/TargetParser/TargetParser.cpp
``````````

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<summary>
View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp 
b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
index 7ce7562cdc..5bbac03dff 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
@@ -5870,8 +5870,9 @@ void 
AMDGPUInstructionSelector::renderSrcAndDstSelToOpSelXForm_2_0(
 void AMDGPUInstructionSelector::renderDstSelToOpSel3XFormXForm(
     MachineInstrBuilder &MIB, const MachineInstr &MI, int OpIdx) const {
   assert(OpIdx >= 0 && "expected to match an immediate operand");
-  MIB.addImm(
-      (MI.getOperand(OpIdx).getImm() & 0x2) ? (int64_t)SISrcMods::DST_OP_SEL  
: 0);
+  MIB.addImm((MI.getOperand(OpIdx).getImm() & 0x2)
+                 ? (int64_t)SISrcMods::DST_OP_SEL
+                 : 0);
 }
 
 void AMDGPUInstructionSelector::renderExtractCPol(MachineInstrBuilder &MIB,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h 
b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
index a81f1579fb..bcbb471bd2 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
@@ -362,7 +362,7 @@ private:
                                           int OpIdx) const;
 
   void renderDstSelToOpSel3XFormXForm(MachineInstrBuilder &MIB,
-                                const MachineInstr &MI, int OpIdx) const;
+                                      const MachineInstr &MI, int OpIdx) const;
 
   void renderNegateImm(MachineInstrBuilder &MIB, const MachineInstr &MI,
                        int OpIdx) const;

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https://github.com/llvm/llvm-project/pull/117743
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