[llvm-branch-commits] [llvm] AMDGPU: Handle vcmpx+permalane gfx950 hazard (PR #117286)

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``````````bash
git-clang-format --diff 52f540df160ad84aef090acb35c9372c270d758b 
0cbee40e03bff1514abbf1e879522a4808175c1a --extensions cpp,h -- 
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp 
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
``````````

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View the diff from clang-format here.
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``````````diff
diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp 
b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
index 45ff1f4a63..9799556084 100644
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -1207,12 +1207,11 @@ void GCNHazardRecognizer::fixHazards(MachineInstr *MI) {
   fixRequiredExportPriority(MI);
 }
 
-static bool isVCmpXWritesExec(const SIInstrInfo &TII,
-                              const SIRegisterInfo &TRI,
+static bool isVCmpXWritesExec(const SIInstrInfo &TII, const SIRegisterInfo 
&TRI,
                               const MachineInstr &MI) {
   return (TII.isVOPC(MI) ||
           (MI.isCompare() && (TII.isVOP3(MI) || TII.isSDWA(MI)))) &&
-    MI.modifiesRegister(AMDGPU::EXEC, &TRI);
+         MI.modifiesRegister(AMDGPU::EXEC, &TRI);
 }
 
 bool GCNHazardRecognizer::fixVcmpxPermlaneHazards(MachineInstr *MI) {

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https://github.com/llvm/llvm-project/pull/117286
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