================ @@ -683,6 +686,17 @@ def CreateHandle : DXILOp<57, createHandle> { let stages = [Stages<DXIL1_0, [all_stages]>]; } +def BufferLoad : DXILOp<68, bufferLoad> { + let Doc = "reads from a TypedBuffer"; + // Handle, Coord0, Coord1 + let arguments = [HandleTy, Int32Ty, Int32Ty]; + let result = OverloadTy; + let overloads = + [Overloads<DXIL1_0, + [ResRetHalfTy, ResRetFloatTy, ResRetInt16Ty, ResRetInt32Ty]>]; ---------------- llvm-beanz wrote:
The 16-bit overloads were always valid in DXIL 1.0, but they didn't actually mean 16-bit types, they meant the min16{float|int|uint} types. This is one of the things that's really wonky about DXIL defining interpretations of LLVM IR that conflicted with LLVM's core definition. I think the code here is accurate to what we need for that. https://github.com/llvm/llvm-project/pull/104252 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits