https://github.com/arsenm updated
https://github.com/llvm/llvm-project/pull/103721
>From a10910597e6ee30e87dd09a4f77fcfa1729873f0 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan <christudasan.devada...@amd.com>
Date: Wed, 14 Aug 2024 14:18:59 +0530
Subject: [PATCH 1/3] [AMDGPU][R600] Move R600TargetMachine into
R600CodeGenPassBuilder(NFC).
---
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 +-
llvm/lib/Target/AMDGPU/CMakeLists.txt | 1 -
.../Target/AMDGPU/R600CodeGenPassBuilder.cpp | 149 ++++++++++++++++-
.../Target/AMDGPU/R600CodeGenPassBuilder.h | 38 ++++-
llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 3 +-
llvm/lib/Target/AMDGPU/R600TargetMachine.cpp | 154 ------------------
6 files changed, 187 insertions(+), 160 deletions(-)
delete mode 100644 llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index bcedc3623d3ed7..13024f45151899 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -32,8 +32,8 @@
#include "GCNSchedStrategy.h"
#include "GCNVOPDUtils.h"
#include "R600.h"
+#include "R600CodeGenPassBuilder.h"
#include "R600MachineFunctionInfo.h"
-#include "R600TargetMachine.h"
#include "SIFixSGPRCopies.h"
#include "SIMachineFunctionInfo.h"
#include "SIMachineScheduler.h"
diff --git a/llvm/lib/Target/AMDGPU/CMakeLists.txt
b/llvm/lib/Target/AMDGPU/CMakeLists.txt
index f493076f5bb8a3..16186f1f1bbed0 100644
--- a/llvm/lib/Target/AMDGPU/CMakeLists.txt
+++ b/llvm/lib/Target/AMDGPU/CMakeLists.txt
@@ -137,7 +137,6 @@ add_llvm_target(AMDGPUCodeGen
R600Packetizer.cpp
R600RegisterInfo.cpp
R600Subtarget.cpp
- R600TargetMachine.cpp
R600TargetTransformInfo.cpp
SIAnnotateControlFlow.cpp
SIFixSGPRCopies.cpp
diff --git a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp
b/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp
index a57b3aa0adb158..1b182e17add9c0 100644
--- a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp
@@ -5,12 +5,159 @@
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
+//
+/// \file
+/// This file contains both AMDGPU-R600 target machine and the CodeGen pass
+/// builder. The target machine contains all of the hardware specific
+/// information needed to emit code for R600 GPUs and the CodeGen pass builder
+/// handles the same for new pass manager infrastructure.
+//
+//===----------------------------------------------------------------------===//
#include "R600CodeGenPassBuilder.h"
-#include "R600TargetMachine.h"
+#include "R600.h"
+#include "R600MachineScheduler.h"
+#include "R600TargetTransformInfo.h"
+#include "llvm/Transforms/Scalar.h"
+#include <optional>
using namespace llvm;
+static cl::opt<bool>
+ EnableR600StructurizeCFG("r600-ir-structurize",
+ cl::desc("Use StructurizeCFG IR pass"),
+ cl::init(true));
+
+static cl::opt<bool> EnableR600IfConvert("r600-if-convert",
+ cl::desc("Use if conversion pass"),
+ cl::ReallyHidden, cl::init(true));
+
+static cl::opt<bool, true> EnableAMDGPUFunctionCallsOpt(
+ "amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"),
+ cl::location(AMDGPUTargetMachine::EnableFunctionCalls), cl::init(true),
+ cl::Hidden);
+
+static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) {
+ return new ScheduleDAGMILive(C, std::make_unique<R600SchedStrategy>());
+}
+
+static MachineSchedRegistry R600SchedRegistry("r600",
+ "Run R600's custom scheduler",
+ createR600MachineScheduler);
+
+//===----------------------------------------------------------------------===//
+// R600 Target Machine (R600 -> Cayman) - Legacy Pass Manager interface.
+//===----------------------------------------------------------------------===//
+
+R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
+ StringRef CPU, StringRef FS,
+ const TargetOptions &Options,
+ std::optional<Reloc::Model> RM,
+ std::optional<CodeModel::Model> CM,
+ CodeGenOptLevel OL, bool JIT)
+ : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
+ setRequiresStructuredCFG(true);
+
+ // Override the default since calls aren't supported for r600.
+ if (EnableFunctionCalls &&
+ EnableAMDGPUFunctionCallsOpt.getNumOccurrences() == 0)
+ EnableFunctionCalls = false;
+}
+
+const TargetSubtargetInfo *
+R600TargetMachine::getSubtargetImpl(const Function &F) const {
+ StringRef GPU = getGPUName(F);
+ StringRef FS = getFeatureString(F);
+
+ SmallString<128> SubtargetKey(GPU);
+ SubtargetKey.append(FS);
+
+ auto &I = SubtargetMap[SubtargetKey];
+ if (!I) {
+ // This needs to be done before we create a new subtarget since any
+ // creation will depend on the TM and the code generation flags on the
+ // function that reside in TargetOptions.
+ resetTargetOptions(F);
+ I = std::make_unique<R600Subtarget>(TargetTriple, GPU, FS, *this);
+ }
+
+ return I.get();
+}
+
+TargetTransformInfo
+R600TargetMachine::getTargetTransformInfo(const Function &F) const {
+ return TargetTransformInfo(R600TTIImpl(this, F));
+}
+
+namespace {
+class R600PassConfig final : public AMDGPUPassConfig {
+public:
+ R600PassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
+ : AMDGPUPassConfig(TM, PM) {}
+
+ ScheduleDAGInstrs *
+ createMachineScheduler(MachineSchedContext *C) const override {
+ return createR600MachineScheduler(C);
+ }
+
+ bool addPreISel() override;
+ bool addInstSelector() override;
+ void addPreRegAlloc() override;
+ void addPreSched2() override;
+ void addPreEmitPass() override;
+};
+} // namespace
+
+//===----------------------------------------------------------------------===//
+// R600 Legacy Pass Setup
+//===----------------------------------------------------------------------===//
+
+bool R600PassConfig::addPreISel() {
+ AMDGPUPassConfig::addPreISel();
+
+ if (EnableR600StructurizeCFG)
+ addPass(createStructurizeCFGPass());
+ return false;
+}
+
+bool R600PassConfig::addInstSelector() {
+ addPass(createR600ISelDag(getAMDGPUTargetMachine(), getOptLevel()));
+ return false;
+}
+
+void R600PassConfig::addPreRegAlloc() { addPass(createR600VectorRegMerger()); }
+
+void R600PassConfig::addPreSched2() {
+ addPass(createR600EmitClauseMarkers());
+ if (EnableR600IfConvert)
+ addPass(&IfConverterID);
+ addPass(createR600ClauseMergePass());
+}
+
+void R600PassConfig::addPreEmitPass() {
+ addPass(createR600MachineCFGStructurizerPass());
+ addPass(createR600ExpandSpecialInstrsPass());
+ addPass(&FinalizeMachineBundlesID);
+ addPass(createR600Packetizer());
+ addPass(createR600ControlFlowFinalizer());
+}
+
+TargetPassConfig *R600TargetMachine::createPassConfig(PassManagerBase &PM) {
+ return new R600PassConfig(*this, PM);
+}
+
+Error R600TargetMachine::buildCodeGenPipeline(
+ ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
+ CodeGenFileType FileType, const CGPassBuilderOption &Opts,
+ PassInstrumentationCallbacks *PIC) {
+ R600CodeGenPassBuilder CGPB(*this, Opts, PIC);
+ return CGPB.buildPipeline(MPM, Out, DwoOut, FileType);
+}
+
+//===----------------------------------------------------------------------===//
+// R600 Target Machine (R600 -> Cayman)
+//===----------------------------------------------------------------------===//
+
R600CodeGenPassBuilder::R600CodeGenPassBuilder(
R600TargetMachine &TM, const CGPassBuilderOption &Opts,
PassInstrumentationCallbacks *PIC)
diff --git a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h
b/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h
index be7c935c094d9f..a921467c04c727 100644
--- a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h
+++ b/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h
@@ -9,12 +9,48 @@
#ifndef LLVM_LIB_TARGET_AMDGPU_R600CODEGENPASSBUILDER_H
#define LLVM_LIB_TARGET_AMDGPU_R600CODEGENPASSBUILDER_H
+#include "AMDGPUCodeGenPassBuilder.h"
+#include "R600Subtarget.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/Passes/CodeGenPassBuilder.h"
+#include "llvm/Target/TargetMachine.h"
+#include <optional>
namespace llvm {
-class R600TargetMachine;
+//===----------------------------------------------------------------------===//
+// R600 Target Machine (R600 -> Cayman) - For Legacy Pass Manager.
+//===----------------------------------------------------------------------===//
+
+class R600TargetMachine final : public AMDGPUTargetMachine {
+private:
+ mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
+
+public:
+ R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
+ StringRef FS, const TargetOptions &Options,
+ std::optional<Reloc::Model> RM,
+ std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
+ bool JIT);
+
+ TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
+
+ Error buildCodeGenPipeline(ModulePassManager &MPM, raw_pwrite_stream &Out,
+ raw_pwrite_stream *DwoOut,
+ CodeGenFileType FileType,
+ const CGPassBuilderOption &Opt,
+ PassInstrumentationCallbacks *PIC) override;
+
+ const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override;
+
+ TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
+
+ bool isMachineVerifierClean() const override { return false; }
+
+ MachineFunctionInfo *
+ createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
+ const TargetSubtargetInfo *STI) const override;
+};
class R600CodeGenPassBuilder
: public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> {
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
index c79688bf038be3..fe7ed1ac26169e 100644
--- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
@@ -14,11 +14,10 @@
#include "R600ISelLowering.h"
#include "AMDGPU.h"
#include "MCTargetDesc/R600MCTargetDesc.h"
+#include "R600CodeGenPassBuilder.h"
#include "R600Defines.h"
-#include "R600InstrInfo.h"
#include "R600MachineFunctionInfo.h"
#include "R600Subtarget.h"
-#include "R600TargetMachine.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsR600.h"
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
deleted file mode 100644
index fe1927e5bdf74a..00000000000000
--- a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+++ /dev/null
@@ -1,154 +0,0 @@
-//===-- R600TargetMachine.cpp - TargetMachine for hw codegen
targets-------===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-/// \file
-/// The AMDGPU-R600 target machine contains all of the hardware specific
-/// information needed to emit code for R600 GPUs.
-//
-//===----------------------------------------------------------------------===//
-
-#include "R600TargetMachine.h"
-#include "R600.h"
-#include "R600CodeGenPassBuilder.h"
-#include "R600MachineScheduler.h"
-#include "R600TargetTransformInfo.h"
-#include "llvm/Transforms/Scalar.h"
-#include <optional>
-
-using namespace llvm;
-
-static cl::opt<bool>
- EnableR600StructurizeCFG("r600-ir-structurize",
- cl::desc("Use StructurizeCFG IR pass"),
- cl::init(true));
-
-static cl::opt<bool> EnableR600IfConvert("r600-if-convert",
- cl::desc("Use if conversion pass"),
- cl::ReallyHidden, cl::init(true));
-
-static cl::opt<bool, true> EnableAMDGPUFunctionCallsOpt(
- "amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"),
- cl::location(AMDGPUTargetMachine::EnableFunctionCalls), cl::init(true),
- cl::Hidden);
-
-static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) {
- return new ScheduleDAGMILive(C, std::make_unique<R600SchedStrategy>());
-}
-
-static MachineSchedRegistry R600SchedRegistry("r600",
- "Run R600's custom scheduler",
- createR600MachineScheduler);
-
-//===----------------------------------------------------------------------===//
-// R600 Target Machine (R600 -> Cayman)
-//===----------------------------------------------------------------------===//
-
-R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
- StringRef CPU, StringRef FS,
- const TargetOptions &Options,
- std::optional<Reloc::Model> RM,
- std::optional<CodeModel::Model> CM,
- CodeGenOptLevel OL, bool JIT)
- : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
- setRequiresStructuredCFG(true);
-
- // Override the default since calls aren't supported for r600.
- if (EnableFunctionCalls &&
- EnableAMDGPUFunctionCallsOpt.getNumOccurrences() == 0)
- EnableFunctionCalls = false;
-}
-
-const TargetSubtargetInfo *
-R600TargetMachine::getSubtargetImpl(const Function &F) const {
- StringRef GPU = getGPUName(F);
- StringRef FS = getFeatureString(F);
-
- SmallString<128> SubtargetKey(GPU);
- SubtargetKey.append(FS);
-
- auto &I = SubtargetMap[SubtargetKey];
- if (!I) {
- // This needs to be done before we create a new subtarget since any
- // creation will depend on the TM and the code generation flags on the
- // function that reside in TargetOptions.
- resetTargetOptions(F);
- I = std::make_unique<R600Subtarget>(TargetTriple, GPU, FS, *this);
- }
-
- return I.get();
-}
-
-TargetTransformInfo
-R600TargetMachine::getTargetTransformInfo(const Function &F) const {
- return TargetTransformInfo(R600TTIImpl(this, F));
-}
-
-namespace {
-class R600PassConfig final : public AMDGPUPassConfig {
-public:
- R600PassConfig(LLVMTargetMachine &TM, PassManagerBase &PM)
- : AMDGPUPassConfig(TM, PM) {}
-
- ScheduleDAGInstrs *
- createMachineScheduler(MachineSchedContext *C) const override {
- return createR600MachineScheduler(C);
- }
-
- bool addPreISel() override;
- bool addInstSelector() override;
- void addPreRegAlloc() override;
- void addPreSched2() override;
- void addPreEmitPass() override;
-};
-} // namespace
-
-//===----------------------------------------------------------------------===//
-// R600 Pass Setup
-//===----------------------------------------------------------------------===//
-
-bool R600PassConfig::addPreISel() {
- AMDGPUPassConfig::addPreISel();
-
- if (EnableR600StructurizeCFG)
- addPass(createStructurizeCFGPass());
- return false;
-}
-
-bool R600PassConfig::addInstSelector() {
- addPass(createR600ISelDag(getAMDGPUTargetMachine(), getOptLevel()));
- return false;
-}
-
-void R600PassConfig::addPreRegAlloc() { addPass(createR600VectorRegMerger()); }
-
-void R600PassConfig::addPreSched2() {
- addPass(createR600EmitClauseMarkers());
- if (EnableR600IfConvert)
- addPass(&IfConverterID);
- addPass(createR600ClauseMergePass());
-}
-
-void R600PassConfig::addPreEmitPass() {
- addPass(createR600MachineCFGStructurizerPass());
- addPass(createR600ExpandSpecialInstrsPass());
- addPass(&FinalizeMachineBundlesID);
- addPass(createR600Packetizer());
- addPass(createR600ControlFlowFinalizer());
-}
-
-TargetPassConfig *R600TargetMachine::createPassConfig(PassManagerBase &PM) {
- return new R600PassConfig(*this, PM);
-}
-
-Error R600TargetMachine::buildCodeGenPipeline(
- ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
- CodeGenFileType FileType, const CGPassBuilderOption &Opts,
- PassInstrumentationCallbacks *PIC) {
- R600CodeGenPassBuilder CGPB(*this, Opts, PIC);
- return CGPB.buildPipeline(MPM, Out, DwoOut, FileType);
-}
>From f8b0a22ba39fed216a555dba4762211cbcbea356 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan <christudasan.devada...@amd.com>
Date: Wed, 14 Aug 2024 20:31:25 +0530
Subject: [PATCH 2/3] moving R600CodeGenPassBuilder into R600TargetMachine.
---
.../lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 +-
llvm/lib/Target/AMDGPU/CMakeLists.txt | 2 +-
.../Target/AMDGPU/R600CodeGenPassBuilder.h | 68 -------------------
llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 2 +-
...nPassBuilder.cpp => R600TargetMachine.cpp} | 12 ++--
llvm/lib/Target/AMDGPU/R600TargetMachine.h | 15 ++++
6 files changed, 24 insertions(+), 77 deletions(-)
delete mode 100644 llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h
rename llvm/lib/Target/AMDGPU/{R600CodeGenPassBuilder.cpp =>
R600TargetMachine.cpp} (95%)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 13024f45151899..bcedc3623d3ed7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -32,8 +32,8 @@
#include "GCNSchedStrategy.h"
#include "GCNVOPDUtils.h"
#include "R600.h"
-#include "R600CodeGenPassBuilder.h"
#include "R600MachineFunctionInfo.h"
+#include "R600TargetMachine.h"
#include "SIFixSGPRCopies.h"
#include "SIMachineFunctionInfo.h"
#include "SIMachineScheduler.h"
diff --git a/llvm/lib/Target/AMDGPU/CMakeLists.txt
b/llvm/lib/Target/AMDGPU/CMakeLists.txt
index 16186f1f1bbed0..c91584ae8ce59c 100644
--- a/llvm/lib/Target/AMDGPU/CMakeLists.txt
+++ b/llvm/lib/Target/AMDGPU/CMakeLists.txt
@@ -121,7 +121,6 @@ add_llvm_target(AMDGPUCodeGen
GCNVOPDUtils.cpp
R600AsmPrinter.cpp
R600ClauseMergePass.cpp
- R600CodeGenPassBuilder.cpp
R600ControlFlowFinalizer.cpp
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp
@@ -137,6 +136,7 @@ add_llvm_target(AMDGPUCodeGen
R600Packetizer.cpp
R600RegisterInfo.cpp
R600Subtarget.cpp
+ R600TargetMachine.cpp
R600TargetTransformInfo.cpp
SIAnnotateControlFlow.cpp
SIFixSGPRCopies.cpp
diff --git a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h
b/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h
deleted file mode 100644
index a921467c04c727..00000000000000
--- a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.h
+++ /dev/null
@@ -1,68 +0,0 @@
-//===-- R600CodeGenPassBuilder.h -- Build R600 CodeGen pipeline -*- C++
-*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_LIB_TARGET_AMDGPU_R600CODEGENPASSBUILDER_H
-#define LLVM_LIB_TARGET_AMDGPU_R600CODEGENPASSBUILDER_H
-
-#include "AMDGPUCodeGenPassBuilder.h"
-#include "R600Subtarget.h"
-#include "llvm/MC/MCStreamer.h"
-#include "llvm/Passes/CodeGenPassBuilder.h"
-#include "llvm/Target/TargetMachine.h"
-#include <optional>
-
-namespace llvm {
-
-//===----------------------------------------------------------------------===//
-// R600 Target Machine (R600 -> Cayman) - For Legacy Pass Manager.
-//===----------------------------------------------------------------------===//
-
-class R600TargetMachine final : public AMDGPUTargetMachine {
-private:
- mutable StringMap<std::unique_ptr<R600Subtarget>> SubtargetMap;
-
-public:
- R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
- StringRef FS, const TargetOptions &Options,
- std::optional<Reloc::Model> RM,
- std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
- bool JIT);
-
- TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
-
- Error buildCodeGenPipeline(ModulePassManager &MPM, raw_pwrite_stream &Out,
- raw_pwrite_stream *DwoOut,
- CodeGenFileType FileType,
- const CGPassBuilderOption &Opt,
- PassInstrumentationCallbacks *PIC) override;
-
- const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override;
-
- TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
-
- bool isMachineVerifierClean() const override { return false; }
-
- MachineFunctionInfo *
- createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
- const TargetSubtargetInfo *STI) const override;
-};
-
-class R600CodeGenPassBuilder
- : public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> {
-public:
- R600CodeGenPassBuilder(R600TargetMachine &TM, const CGPassBuilderOption
&Opts,
- PassInstrumentationCallbacks *PIC);
-
- void addPreISel(AddIRPass &addPass) const;
- void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
- Error addInstSelector(AddMachinePass &) const;
-};
-
-} // namespace llvm
-
-#endif // LLVM_LIB_TARGET_AMDGPU_R600CODEGENPASSBUILDER_H
diff --git a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
index fe7ed1ac26169e..7e4d9d21a0b397 100644
--- a/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
@@ -14,10 +14,10 @@
#include "R600ISelLowering.h"
#include "AMDGPU.h"
#include "MCTargetDesc/R600MCTargetDesc.h"
-#include "R600CodeGenPassBuilder.h"
#include "R600Defines.h"
#include "R600MachineFunctionInfo.h"
#include "R600Subtarget.h"
+#include "R600TargetMachine.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsR600.h"
diff --git a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp
b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
similarity index 95%
rename from llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp
rename to llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
index 1b182e17add9c0..06ae5f72893608 100644
--- a/llvm/lib/Target/AMDGPU/R600CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
@@ -1,4 +1,4 @@
-//===-- R600CodeGenPassBuilder.cpp ------ Build R600 CodeGen pipeline
-----===//
+//===-- R600TargetMachine.cpp - TargetMachine for hw codegen
targets-------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -10,11 +10,11 @@
/// This file contains both AMDGPU-R600 target machine and the CodeGen pass
/// builder. The target machine contains all of the hardware specific
/// information needed to emit code for R600 GPUs and the CodeGen pass builder
-/// handles the same for new pass manager infrastructure.
+/// handles the pass pipeline for new pass manager.
//
//===----------------------------------------------------------------------===//
-#include "R600CodeGenPassBuilder.h"
+#include "R600TargetMachine.h"
#include "R600.h"
#include "R600MachineScheduler.h"
#include "R600TargetTransformInfo.h"
@@ -46,7 +46,7 @@ static MachineSchedRegistry R600SchedRegistry("r600",
createR600MachineScheduler);
//===----------------------------------------------------------------------===//
-// R600 Target Machine (R600 -> Cayman) - Legacy Pass Manager interface.
+// R600 Target Machine (R600 -> Cayman)
//===----------------------------------------------------------------------===//
R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
@@ -109,7 +109,7 @@ class R600PassConfig final : public AMDGPUPassConfig {
} // namespace
//===----------------------------------------------------------------------===//
-// R600 Legacy Pass Setup
+// R600 Pass Setup
//===----------------------------------------------------------------------===//
bool R600PassConfig::addPreISel() {
@@ -155,7 +155,7 @@ Error R600TargetMachine::buildCodeGenPipeline(
}
//===----------------------------------------------------------------------===//
-// R600 Target Machine (R600 -> Cayman)
+// R600 CodeGen Pass Builder interface.
//===----------------------------------------------------------------------===//
R600CodeGenPassBuilder::R600CodeGenPassBuilder(
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.h
b/llvm/lib/Target/AMDGPU/R600TargetMachine.h
index 29e370edef2c67..b7f123a07a9c1d 100644
--- a/llvm/lib/Target/AMDGPU/R600TargetMachine.h
+++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.h
@@ -55,6 +55,21 @@ class R600TargetMachine final : public AMDGPUTargetMachine {
const TargetSubtargetInfo *STI) const override;
};
+//===----------------------------------------------------------------------===//
+// R600 CodeGen Pass Builder interface.
+//===----------------------------------------------------------------------===//
+
+class R600CodeGenPassBuilder
+ : public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> {
+public:
+ R600CodeGenPassBuilder(R600TargetMachine &TM, const CGPassBuilderOption
&Opts,
+ PassInstrumentationCallbacks *PIC);
+
+ void addPreISel(AddIRPass &addPass) const;
+ void addAsmPrinter(AddMachinePass &, CreateMCStreamer) const;
+ Error addInstSelector(AddMachinePass &) const;
+};
+
} // end namespace llvm
#endif // LLVM_LIB_TARGET_AMDGPU_R600TARGETMACHINE_H
>From 762628733671bc1436c522b9d6013bafe77f7b56 Mon Sep 17 00:00:00 2001
From: Christudasan Devadasan <christudasan.devada...@amd.com>
Date: Fri, 16 Aug 2024 18:16:38 +0530
Subject: [PATCH 3/3] [AMDGPU][R600] Move createMachineFunctionInfo into R600
TM. (#104038)
This definition shouldn't be in AMDGPU TM.
---
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 8 --------
llvm/lib/Target/AMDGPU/R600TargetMachine.cpp | 8 ++++++++
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index bcedc3623d3ed7..f5da459a43c594 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -32,7 +32,6 @@
#include "GCNSchedStrategy.h"
#include "GCNVOPDUtils.h"
#include "R600.h"
-#include "R600MachineFunctionInfo.h"
#include "R600TargetMachine.h"
#include "SIFixSGPRCopies.h"
#include "SIMachineFunctionInfo.h"
@@ -1193,13 +1192,6 @@
AMDGPUPassConfig::createMachineScheduler(MachineSchedContext *C) const {
return DAG;
}
-MachineFunctionInfo *R600TargetMachine::createMachineFunctionInfo(
- BumpPtrAllocator &Allocator, const Function &F,
- const TargetSubtargetInfo *STI) const {
- return R600MachineFunctionInfo::create<R600MachineFunctionInfo>(
- Allocator, F, static_cast<const R600Subtarget *>(STI));
-}
-
//===----------------------------------------------------------------------===//
// GCN Legacy Pass Setup
//===----------------------------------------------------------------------===//
diff --git a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
index 06ae5f72893608..a1a60b8bdfa9ee 100644
--- a/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/R600TargetMachine.cpp
@@ -16,6 +16,7 @@
#include "R600TargetMachine.h"
#include "R600.h"
+#include "R600MachineFunctionInfo.h"
#include "R600MachineScheduler.h"
#include "R600TargetTransformInfo.h"
#include "llvm/Transforms/Scalar.h"
@@ -154,6 +155,13 @@ Error R600TargetMachine::buildCodeGenPipeline(
return CGPB.buildPipeline(MPM, Out, DwoOut, FileType);
}
+MachineFunctionInfo *R600TargetMachine::createMachineFunctionInfo(
+ BumpPtrAllocator &Allocator, const Function &F,
+ const TargetSubtargetInfo *STI) const {
+ return R600MachineFunctionInfo::create<R600MachineFunctionInfo>(
+ Allocator, F, static_cast<const R600Subtarget *>(STI));
+}
+
//===----------------------------------------------------------------------===//
// R600 CodeGen Pass Builder interface.
//===----------------------------------------------------------------------===//
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