================
@@ -867,13 +867,104 @@ def SMRDBufferImm : ComplexPattern<iPTR, 1,
"SelectSMRDBufferImm">;
def SMRDBufferImm32 : ComplexPattern<iPTR, 1, "SelectSMRDBufferImm32">;
def SMRDBufferSgprImm : ComplexPattern<iPTR, 2, "SelectSMRDBufferSgprImm">;
+class SMRDAlignedLoadPat<PatFrag Op> : PatFrag <(ops node:$ptr), (Op
node:$ptr), [{
+ // Returns true if it is a naturally aligned multi-dword load.
+ LoadSDNode *Ld = cast<LoadSDNode>(N);
+ unsigned Size = Ld->getMemoryVT().getStoreSize();
+ return (Size <= 4) || (Ld->getAlign().value() >= PowerOf2Ceil(Size));
----------------
cdevadas wrote:
Isn't it 12 >= 16 or 16 >=16?
The PowerOf2Ceil intends to catch the first case where the specified Align is
smaller than its natural alignment.
https://github.com/llvm/llvm-project/pull/96163
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