Author: Alex Bradbury Date: 2022-03-07T10:58:20Z New Revision: 9d54fe21c67fdb76bfd95c329a31bda2cb91c520
URL: https://github.com/llvm/llvm-project/commit/9d54fe21c67fdb76bfd95c329a31bda2cb91c520 DIFF: https://github.com/llvm/llvm-project/commit/9d54fe21c67fdb76bfd95c329a31bda2cb91c520.diff LOG: [docs] Add RISC-V release notes for LLVM 14 Differential Revision: https://reviews.llvm.org/D120047 Added: Modified: llvm/docs/ReleaseNotes.rst Removed: ################################################################################ diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index 28282c54e7390..e8934f79181a7 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -135,6 +135,30 @@ AIX Support/improvements: * AIX 64-bit code generation now uses fast-isel for O0. * Added DWARF support for 32-bit XCOFF. +Changes to the RISC-V Target +---------------------------- + +* Codegen improvements for RV64 around the selection of addw/subw/mulw/slliw + instructions and removal of redundant sext.w instructions (using the new + RISCVSExtWRemoval pass). +* The various RISC-V vector extensions were updated to version 1.0 and are no + longer experimental. +* The Zba, Zbb, Zbc, and Zbs bit-manipulation extensions were updated to + version 1.0 and are no longer experimental. +* Added MC layer support for the ratified scalar cryptography extensions. +* The Zfh and Zfhmin extensions for half-precision floating point were updated + to version 1.0 and are no longer experimental. +* Added support for the ``.insn`` directive. +* Various improvements to immediate materialisation, including when + bit-manipulation extensions are enabled. Additionally, the constant pool is + now used for large integers. +* Added support for constrained FP intrinsics for scalar types. +* Added support for CSRs introduced in the Sscofpmf, Smstateen, and Sstc + extensions. +* The experimental 'Zbproposedc' extension was removed, as was the 'B' + extension (including all bit-manipulation sub-extensions). Individual 'Zb*' + extensions should be used instead. + Changes to the X86 Target ------------------------- _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
