Author: Luo, Yuanke Date: 2022-02-16T10:51:45-08:00 New Revision: 6311bae1b42429729e0a03f84fc4dc4d5683686a
URL: https://github.com/llvm/llvm-project/commit/6311bae1b42429729e0a03f84fc4dc4d5683686a DIFF: https://github.com/llvm/llvm-project/commit/6311bae1b42429729e0a03f84fc4dc4d5683686a.diff LOG: [X86] Add test cases for fmul/fdiv with select. (cherry picked from commit 24562babdf16093052230e91332f1b1f13e2c4de) Added: Modified: llvm/test/CodeGen/X86/vector-bo-select.ll Removed: ################################################################################ diff --git a/llvm/test/CodeGen/X86/vector-bo-select.ll b/llvm/test/CodeGen/X86/vector-bo-select.ll index 93777915b1b88..63d5031e6166f 100644 --- a/llvm/test/CodeGen/X86/vector-bo-select.ll +++ b/llvm/test/CodeGen/X86/vector-bo-select.ll @@ -779,3 +779,285 @@ define <8 x double> @fsub_v8f64_cast_cond(i8 noundef zeroext %pb, <8 x double> n %r = fsub <8 x double> %x, %s ret <8 x double> %r } + +define <8 x float> @fmul_v8f32_cast_cond(i8 noundef zeroext %pb, <8 x float> noundef %x, <8 x float> noundef %y) { +; AVX2-LABEL: fmul_v8f32_cast_cond: +; AVX2: # %bb.0: +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $5, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: movl %edi, %ecx +; AVX2-NEXT: shrb $4, %cl +; AVX2-NEXT: movzbl %cl, %ecx +; AVX2-NEXT: andl $1, %ecx +; AVX2-NEXT: negl %ecx +; AVX2-NEXT: vmovd %ecx, %xmm2 +; AVX2-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $6, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $7, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vpinsrd $3, %eax, %xmm2, %xmm2 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vmovd %eax, %xmm3 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $2, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3 +; AVX2-NEXT: shrb $3, %dil +; AVX2-NEXT: movzbl %dil, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vpinsrd $3, %eax, %xmm3, %xmm3 +; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2 +; AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX2-NEXT: vblendvps %ymm2, %ymm1, %ymm3, %ymm1 +; AVX2-NEXT: vmulps %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retq +; +; AVX512F-LABEL: fmul_v8f32_cast_cond: +; AVX512F: # %bb.0: +; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 +; AVX512F-NEXT: kmovw %edi, %k1 +; AVX512F-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX512F-NEXT: vmovaps %zmm1, %zmm2 {%k1} +; AVX512F-NEXT: vmulps %ymm2, %ymm0, %ymm0 +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: fmul_v8f32_cast_cond: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: kmovw %edi, %k1 +; AVX512VL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX512VL-NEXT: vmovaps %ymm1, %ymm2 {%k1} +; AVX512VL-NEXT: vmulps %ymm2, %ymm0, %ymm0 +; AVX512VL-NEXT: retq + %b = bitcast i8 %pb to <8 x i1> + %s = select <8 x i1> %b, <8 x float> %y, <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0> + %r = fmul <8 x float> %x, %s + ret <8 x float> %r +} + +define <8 x double> @fmul_v8f64_cast_cond(i8 noundef zeroext %pb, <8 x double> noundef %x, <8 x double> noundef %y) { +; AVX2-LABEL: fmul_v8f64_cast_cond: +; AVX2: # %bb.0: +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: movl %edi, %ecx +; AVX2-NEXT: andb $1, %cl +; AVX2-NEXT: movzbl %cl, %ecx +; AVX2-NEXT: vmovd %ecx, %xmm4 +; AVX2-NEXT: vpinsrb $2, %eax, %xmm4, %xmm4 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $2, %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: vpinsrb $4, %eax, %xmm4, %xmm4 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $3, %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: vpinsrb $6, %eax, %xmm4, %xmm4 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $4, %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: vpinsrb $8, %eax, %xmm4, %xmm5 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $5, %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: vpinsrb $10, %eax, %xmm5, %xmm5 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $6, %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: vpinsrb $12, %eax, %xmm5, %xmm5 +; AVX2-NEXT: shrb $7, %dil +; AVX2-NEXT: movzbl %dil, %eax +; AVX2-NEXT: vpinsrb $14, %eax, %xmm5, %xmm5 +; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm5[4,4,5,5,6,6,7,7] +; AVX2-NEXT: vpslld $31, %xmm5, %xmm5 +; AVX2-NEXT: vpmovsxdq %xmm5, %ymm5 +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm6 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX2-NEXT: vblendvpd %ymm5, %ymm3, %ymm6, %ymm3 +; AVX2-NEXT: vpmovzxwd {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero +; AVX2-NEXT: vpslld $31, %xmm4, %xmm4 +; AVX2-NEXT: vpmovsxdq %xmm4, %ymm4 +; AVX2-NEXT: vblendvpd %ymm4, %ymm2, %ymm6, %ymm2 +; AVX2-NEXT: vmulpd %ymm2, %ymm0, %ymm0 +; AVX2-NEXT: vmulpd %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: retq +; +; AVX512-LABEL: fmul_v8f64_cast_cond: +; AVX512: # %bb.0: +; AVX512-NEXT: kmovw %edi, %k1 +; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX512-NEXT: vmovapd %zmm1, %zmm2 {%k1} +; AVX512-NEXT: vmulpd %zmm2, %zmm0, %zmm0 +; AVX512-NEXT: retq + %b = bitcast i8 %pb to <8 x i1> + %s = select <8 x i1> %b, <8 x double> %y, <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0> + %r = fmul <8 x double> %x, %s + ret <8 x double> %r +} + +define <8 x float> @fdiv_v8f32_cast_cond(i8 noundef zeroext %pb, <8 x float> noundef %x, <8 x float> noundef %y) { +; AVX2-LABEL: fdiv_v8f32_cast_cond: +; AVX2: # %bb.0: +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $5, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: movl %edi, %ecx +; AVX2-NEXT: shrb $4, %cl +; AVX2-NEXT: movzbl %cl, %ecx +; AVX2-NEXT: andl $1, %ecx +; AVX2-NEXT: negl %ecx +; AVX2-NEXT: vmovd %ecx, %xmm2 +; AVX2-NEXT: vpinsrd $1, %eax, %xmm2, %xmm2 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $6, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vpinsrd $2, %eax, %xmm2, %xmm2 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $7, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vpinsrd $3, %eax, %xmm2, %xmm2 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vmovd %eax, %xmm3 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vpinsrd $1, %eax, %xmm3, %xmm3 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $2, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vpinsrd $2, %eax, %xmm3, %xmm3 +; AVX2-NEXT: shrb $3, %dil +; AVX2-NEXT: movzbl %dil, %eax +; AVX2-NEXT: andl $1, %eax +; AVX2-NEXT: negl %eax +; AVX2-NEXT: vpinsrd $3, %eax, %xmm3, %xmm3 +; AVX2-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2 +; AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX2-NEXT: vblendvps %ymm2, %ymm1, %ymm3, %ymm1 +; AVX2-NEXT: vdivps %ymm1, %ymm0, %ymm0 +; AVX2-NEXT: retq +; +; AVX512F-LABEL: fdiv_v8f32_cast_cond: +; AVX512F: # %bb.0: +; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 +; AVX512F-NEXT: kmovw %edi, %k1 +; AVX512F-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX512F-NEXT: vmovaps %zmm1, %zmm2 {%k1} +; AVX512F-NEXT: vdivps %ymm2, %ymm0, %ymm0 +; AVX512F-NEXT: retq +; +; AVX512VL-LABEL: fdiv_v8f32_cast_cond: +; AVX512VL: # %bb.0: +; AVX512VL-NEXT: kmovw %edi, %k1 +; AVX512VL-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX512VL-NEXT: vmovaps %ymm1, %ymm2 {%k1} +; AVX512VL-NEXT: vdivps %ymm2, %ymm0, %ymm0 +; AVX512VL-NEXT: retq + %b = bitcast i8 %pb to <8 x i1> + %s = select <8 x i1> %b, <8 x float> %y, <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0> + %r = fdiv <8 x float> %x, %s + ret <8 x float> %r +} + +define <8 x double> @fdiv_v8f64_cast_cond(i8 noundef zeroext %pb, <8 x double> noundef %x, <8 x double> noundef %y) { +; AVX2-LABEL: fdiv_v8f64_cast_cond: +; AVX2: # %bb.0: +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: movl %edi, %ecx +; AVX2-NEXT: andb $1, %cl +; AVX2-NEXT: movzbl %cl, %ecx +; AVX2-NEXT: vmovd %ecx, %xmm4 +; AVX2-NEXT: vpinsrb $2, %eax, %xmm4, %xmm4 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $2, %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: vpinsrb $4, %eax, %xmm4, %xmm4 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $3, %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: vpinsrb $6, %eax, %xmm4, %xmm4 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $4, %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: vpinsrb $8, %eax, %xmm4, %xmm5 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $5, %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: vpinsrb $10, %eax, %xmm5, %xmm5 +; AVX2-NEXT: movl %edi, %eax +; AVX2-NEXT: shrb $6, %al +; AVX2-NEXT: andb $1, %al +; AVX2-NEXT: movzbl %al, %eax +; AVX2-NEXT: vpinsrb $12, %eax, %xmm5, %xmm5 +; AVX2-NEXT: shrb $7, %dil +; AVX2-NEXT: movzbl %dil, %eax +; AVX2-NEXT: vpinsrb $14, %eax, %xmm5, %xmm5 +; AVX2-NEXT: vpunpckhwd {{.*#+}} xmm5 = xmm5[4,4,5,5,6,6,7,7] +; AVX2-NEXT: vpslld $31, %xmm5, %xmm5 +; AVX2-NEXT: vpmovsxdq %xmm5, %ymm5 +; AVX2-NEXT: vbroadcastsd {{.*#+}} ymm6 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX2-NEXT: vblendvpd %ymm5, %ymm3, %ymm6, %ymm3 +; AVX2-NEXT: vpmovzxwd {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero +; AVX2-NEXT: vpslld $31, %xmm4, %xmm4 +; AVX2-NEXT: vpmovsxdq %xmm4, %ymm4 +; AVX2-NEXT: vblendvpd %ymm4, %ymm2, %ymm6, %ymm2 +; AVX2-NEXT: vdivpd %ymm2, %ymm0, %ymm0 +; AVX2-NEXT: vdivpd %ymm3, %ymm1, %ymm1 +; AVX2-NEXT: retq +; +; AVX512-LABEL: fdiv_v8f64_cast_cond: +; AVX512: # %bb.0: +; AVX512-NEXT: kmovw %edi, %k1 +; AVX512-NEXT: vbroadcastsd {{.*#+}} zmm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; AVX512-NEXT: vmovapd %zmm1, %zmm2 {%k1} +; AVX512-NEXT: vdivpd %zmm2, %zmm0, %zmm0 +; AVX512-NEXT: retq + %b = bitcast i8 %pb to <8 x i1> + %s = select <8 x i1> %b, <8 x double> %y, <8 x double> <double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0, double 1.0> + %r = fdiv <8 x double> %x, %s + ret <8 x double> %r +} _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
