Author: Zarko Todorovski Date: 2021-07-28T11:24:42-04:00 New Revision: 715e6b3a7c7c69b712c0d4bb2704864cfbdc0c8f
URL: https://github.com/llvm/llvm-project/commit/715e6b3a7c7c69b712c0d4bb2704864cfbdc0c8f DIFF: https://github.com/llvm/llvm-project/commit/715e6b3a7c7c69b712c0d4bb2704864cfbdc0c8f.diff LOG: check that r31/x31 is the frame register Added: Modified: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp Removed: ################################################################################ diff --git a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp index d0109f9684462..77ff16ef00abe 100644 --- a/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp +++ b/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp @@ -2023,9 +2023,10 @@ void PPCAIXAsmPrinter::emitTracebackTable() { // Set the 4th byte of the mandatory field. FirstHalfOfMandatoryField |= TracebackTable::IsFunctionNamePresentMask; - static_assert(XCOFF::AllocRegNo == 31, "Unexpected register usage!"); - if (MRI.isPhysRegUsed(Subtarget->isPPC64() ? PPC::X31 : PPC::R31, - /* SkipRegMaskTest */ true)) + const PPCRegisterInfo *RegInfo = + static_cast<const PPCRegisterInfo *>(Subtarget->getRegisterInfo()); + Register FrameReg = RegInfo->getFrameRegister(*MF); + if (FrameReg == (Subtarget->isPPC64() ? PPC::X31 : PPC::R31)) FirstHalfOfMandatoryField |= TracebackTable::IsAllocaUsedMask; const SmallVectorImpl<Register> &MustSaveCRs = FI->getMustSaveCRs(); _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
