Author: Albion Fung Date: 2021-07-13T20:00:05-05:00 New Revision: ffa243081676383b5b3dc0f7b63cb19ec55d92be
URL: https://github.com/llvm/llvm-project/commit/ffa243081676383b5b3dc0f7b63cb19ec55d92be DIFF: https://github.com/llvm/llvm-project/commit/ffa243081676383b5b3dc0f7b63cb19ec55d92be.diff LOG: Init implementation Added: Modified: clang/include/clang/Basic/BuiltinsPPC.def clang/lib/Basic/Targets/PPC.cpp clang/lib/CodeGen/CGBuiltin.cpp llvm/include/llvm/IR/IntrinsicsPowerPC.td llvm/lib/Target/PowerPC/PPCInstr64Bit.td llvm/lib/Target/PowerPC/PPCInstrInfo.td Removed: ################################################################################ diff --git a/clang/include/clang/Basic/BuiltinsPPC.def b/clang/include/clang/Basic/BuiltinsPPC.def index 09769b3f974e..b8a14f85a4bd 100644 --- a/clang/include/clang/Basic/BuiltinsPPC.def +++ b/clang/include/clang/Basic/BuiltinsPPC.def @@ -83,6 +83,7 @@ BUILTIN(__builtin_ppc_mulhwu, "UiUiUi", "") BUILTIN(__builtin_ppc_maddhd, "LLiLLiLLiLLi", "") BUILTIN(__builtin_ppc_maddhdu, "ULLiULLiULLiULLi", "") BUILTIN(__builtin_ppc_maddld, "LLiLLiLLiLLi", "") +BUILTIN(__builtin_ppc_mfspr, "ULiiC", "") BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n") diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index b79b30d7a4cd..2ecafa095dac 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -140,6 +140,7 @@ static void defineXLCompatMacros(MacroBuilder &Builder) { Builder.defineMacro("__maddhd", "__builtin_ppc_maddhd"); Builder.defineMacro("__maddhdu", "__builtin_ppc_maddhdu"); Builder.defineMacro("__maddld", "__builtin_ppc_maddld"); + Builder.defineMacro("__mfspr", "__builtin_ppc_mfspr"); } /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index baa143695418..94ebb60fdd19 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -15463,7 +15463,6 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, return Builder.CreateExtractElement(Unpacked, Index); } - // The PPC MMA builtins take a pointer to a __vector_quad as an argument. // Some of the MMA instructions accumulate their result into an existing // accumulator whereas the others generate a new accumulator. So we need to @@ -15575,6 +15574,18 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID, case PPC::BI__builtin_ppc_ldarx: case PPC::BI__builtin_ppc_lwarx: return emitPPCLoadReserveIntrinsic(*this, BuiltinID, E); + case PPC::BI__builtin_ppc_mfspr: { + dbgs() <<"Hello\n"; + llvm::Type *src0 = EmitScalarExpr(E->getArg(0))->getType(); + src0->dump(); + dbgs() << "Ops size: " << Ops.size() << "\n"; + Function *F = CGM.getIntrinsic(Intrinsic::ppc_mfspr, src0); + // uint64_t Imm = cast<llvm::ConstantInt>(Ops[0])->getZExtValue(); + // Ops[0] = llvm::ConstantInt::get(Int32Ty, Imm); + Value *temp = Builder.CreateCall(F, Ops); + temp->dump(); + return temp; + } } } diff --git a/llvm/include/llvm/IR/IntrinsicsPowerPC.td b/llvm/include/llvm/IR/IntrinsicsPowerPC.td index b021b43afe59..2e5600e68f53 100644 --- a/llvm/include/llvm/IR/IntrinsicsPowerPC.td +++ b/llvm/include/llvm/IR/IntrinsicsPowerPC.td @@ -1598,5 +1598,7 @@ let TargetPrefix = "ppc" in { def int_ppc_maddld : GCCBuiltin<"__builtin_ppc_maddld">, Intrinsic<[llvm_i64_ty], [llvm_i64_ty, llvm_i64_ty, llvm_i64_ty], [IntrNoMem]>; + + def int_ppc_mfspr : Intrinsic<[llvm_anyint_ty], [llvm_i32_ty], [ImmArg<ArgIndex<1>>]>; } diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td index 496f76b69d2e..a709b496d75e 100644 --- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td @@ -412,7 +412,6 @@ def MFSPR8 : XFXForm_1<31, 339, (outs g8rc:$RT), (ins i32imm:$SPR), def MTSPR8 : XFXForm_1<31, 467, (outs), (ins i32imm:$SPR, g8rc:$RT), "mtspr $SPR, $RT", IIC_SprMTSPR>; - //===----------------------------------------------------------------------===// // 64-bit SPR manipulation instrs. @@ -1749,3 +1748,5 @@ def : Pat<(int_ppc_tdw g8rc:$A, g8rc:$B, i32:$IMM), // trapd def : Pat<(int_ppc_trapd g8rc:$A), (TDI 24, $A, 0)>; +def : Pat<(i32 (int_ppc_mfspr i32:$SPR)), + (MFSPR $SPR)>; diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td index d97881fe818b..6d592c9f9953 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td @@ -5445,3 +5445,5 @@ def : Pat<(int_ppc_fctudz f64:$A), (XSCVDPUXDS $A)>; def : Pat<(int_ppc_fctuwz f64:$A), (XSCVDPUXWS $A)>; +def : Pat<(i32 (int_ppc_mfspr i32:$SPR)), + (MFSPR $SPR)>; _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
