Author: David Green Date: 2021-06-25T20:20:29-07:00 New Revision: b7c7b42db1d16c4cab595bf53c62a70a6a505e0e
URL: https://github.com/llvm/llvm-project/commit/b7c7b42db1d16c4cab595bf53c62a70a6a505e0e DIFF: https://github.com/llvm/llvm-project/commit/b7c7b42db1d16c4cab595bf53c62a70a6a505e0e.diff LOG: [ARM] Use just ARM::t2B in ARMBlockPlacementPass The ARMConstantIsland pass will convert any t2B to tB if they are within range after it has added or moved any constant pools. They don't need to be deliberately converted beforehand, and it doesn't deal with needing to convert tB to t2B very well. Added: Modified: llvm/lib/Target/ARM/ARMBlockPlacement.cpp llvm/test/CodeGen/Thumb2/block-placement.mir Removed: ################################################################################ diff --git a/llvm/lib/Target/ARM/ARMBlockPlacement.cpp b/llvm/lib/Target/ARM/ARMBlockPlacement.cpp index 581b4b9857af..9ba16003a97a 100644 --- a/llvm/lib/Target/ARM/ARMBlockPlacement.cpp +++ b/llvm/lib/Target/ARM/ARMBlockPlacement.cpp @@ -145,8 +145,7 @@ bool ARMBlockPlacement::runOnMachineFunction(MachineFunction &MF) { It++) { MachineBasicBlock *MBB = &*It; for (auto &Terminator : MBB->terminators()) { - if (Terminator.getOpcode() != ARM::t2LoopEnd && - Terminator.getOpcode() != ARM::t2LoopEndDec) + if (Terminator.getOpcode() != ARM::t2LoopEndDec) continue; MachineBasicBlock *LETarget = Terminator.getOperand(2).getMBB(); // The LE will become forwards branching if it branches to LoopExit @@ -204,10 +203,8 @@ void ARMBlockPlacement::moveBasicBlock(MachineBasicBlock *BB, if (!Terminator.isUnconditionalBranch()) { // The BB doesn't have an unconditional branch so it relied on // fall-through. Fix by adding an unconditional branch to the moved BB. - unsigned BrOpc = - BBUtils->isBBInRange(&Terminator, To, 254) ? ARM::tB : ARM::t2B; MachineInstrBuilder MIB = - BuildMI(From, Terminator.getDebugLoc(), TII->get(BrOpc)); + BuildMI(From, Terminator.getDebugLoc(), TII->get(ARM::t2B)); MIB.addMBB(To); MIB.addImm(ARMCC::CondCodes::AL); MIB.addReg(ARM::NoRegister); diff --git a/llvm/test/CodeGen/Thumb2/block-placement.mir b/llvm/test/CodeGen/Thumb2/block-placement.mir index ed4a0a6b493d..c38223baba76 100644 --- a/llvm/test/CodeGen/Thumb2/block-placement.mir +++ b/llvm/test/CodeGen/Thumb2/block-placement.mir @@ -48,7 +48,7 @@ body: | ; CHECK: bb.2: ; CHECK: successors: %bb.3(0x80000000) ; CHECK: t2WhileLoopStart killed renamable $r0, %bb.1, implicit-def dead $cpsr - ; CHECK: tB %bb.3, 14 /* CC::al */, $noreg + ; CHECK: t2B %bb.3, 14 /* CC::al */, $noreg ; CHECK: bb.1: ; CHECK: frame-destroy tPOP_RET 14 /* CC::al */, $noreg, def $r7, def $pc ; CHECK: bb.3: @@ -145,7 +145,7 @@ body: | ; CHECK: $lr = tMOVr $r0, 14 /* CC::al */, $noreg ; CHECK: renamable $r0 = t2ADDrs killed renamable $r2, killed $r0, 18, 14 /* CC::al */, $noreg, $noreg ; CHECK: t2WhileLoopStart killed renamable $lr, %bb.1, implicit-def dead $cpsr - ; CHECK: tB %bb.3, 14 /* CC::al */, $noreg + ; CHECK: t2B %bb.3, 14 /* CC::al */, $noreg ; CHECK: bb.1: ; CHECK: successors: %bb.4(0x80000000) ; CHECK: tCMPi8 renamable $r1, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
