Author: Mitch Phillips Date: 2021-01-22T14:32:11-08:00 New Revision: e3a7532cc95ea0b7f748793db44caa95a92ad6d8
URL: https://github.com/llvm/llvm-project/commit/e3a7532cc95ea0b7f748793db44caa95a92ad6d8 DIFF: https://github.com/llvm/llvm-project/commit/e3a7532cc95ea0b7f748793db44caa95a92ad6d8.diff LOG: Revert "[AArch64][GlobalISel] Implement widenScalar for signed overflow" This reverts commit 541d98efa222b00e16c67348810898c2fa11f398. Reason: Dependent patch 3dedad475da45c05bc4f66cd14e9f44581edf0bc broke UBSan on Android: http://lab.llvm.org:8011/#/builders/77/builds/3082 Added: Modified: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir Removed: ################################################################################ diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index aef9e6f70c65..b9e32257d2c8 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -1814,26 +1814,6 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) { return widenScalarMergeValues(MI, TypeIdx, WideTy); case TargetOpcode::G_UNMERGE_VALUES: return widenScalarUnmergeValues(MI, TypeIdx, WideTy); - case TargetOpcode::G_SADDO: - case TargetOpcode::G_SSUBO: { - if (TypeIdx == 1) - return UnableToLegalize; // TODO - auto LHSExt = MIRBuilder.buildSExt(WideTy, MI.getOperand(2)); - auto RHSExt = MIRBuilder.buildSExt(WideTy, MI.getOperand(3)); - unsigned Opcode = MI.getOpcode() == TargetOpcode::G_SADDO - ? TargetOpcode::G_ADD - : TargetOpcode::G_SUB; - auto NewOp = MIRBuilder.buildInstr(Opcode, {WideTy}, {LHSExt, RHSExt}); - LLT OrigTy = MRI.getType(MI.getOperand(0).getReg()); - auto TruncOp = MIRBuilder.buildTrunc(OrigTy, NewOp); - auto ExtOp = MIRBuilder.buildSExt(WideTy, TruncOp); - // There is no overflow if the re-extended result is the same as NewOp. - MIRBuilder.buildICmp(CmpInst::ICMP_NE, MI.getOperand(1), NewOp, ExtOp); - // Now trunc the NewOp to the original result. - MIRBuilder.buildTrunc(MI.getOperand(0), NewOp); - MI.eraseFromParent(); - return Legalized; - } case TargetOpcode::G_UADDO: case TargetOpcode::G_USUBO: { if (TypeIdx == 1) diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir index f3564a950310..4f97d153d28b 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir @@ -73,66 +73,6 @@ body: | %5:_(s64) = G_ANYEXT %4(s8) $x0 = COPY %5(s64) -... ---- -name: test_scalar_uaddo_small -body: | - bb.0.entry: - ; CHECK-LABEL: name: test_scalar_uaddo_small - ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 - ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 - ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 - ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) - ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]] - ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64) - ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]] - ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[AND]], [[AND1]] - ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C]] - ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[ADD]](s32), [[AND2]] - ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32) - ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[ICMP]](s32) - ; CHECK: $x0 = COPY [[ANYEXT]](s64) - ; CHECK: $x1 = COPY [[ANYEXT1]](s64) - %0:_(s64) = COPY $x0 - %1:_(s64) = COPY $x1 - %2:_(s8) = G_TRUNC %0(s64) - %3:_(s8) = G_TRUNC %1(s64) - %4:_(s8), %5:_(s1) = G_UADDO %2, %3 - %6:_(s64) = G_ANYEXT %4(s8) - %7:_(s64) = G_ANYEXT %5(s1) - $x0 = COPY %6(s64) - $x1 = COPY %7(s64) - -... ---- -name: test_scalar_saddo_small -body: | - bb.0.entry: - ; CHECK-LABEL: name: test_scalar_saddo_small - ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 - ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 - ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) - ; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[TRUNC]], 8 - ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64) - ; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[TRUNC1]], 8 - ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[SEXT_INREG]], [[SEXT_INREG1]] - ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ADD]](s32) - ; CHECK: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 8 - ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[ADD]](s32), [[SEXT_INREG2]] - ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32) - ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[ICMP]](s32) - ; CHECK: $x0 = COPY [[ANYEXT]](s64) - ; CHECK: $x1 = COPY [[ANYEXT1]](s64) - %0:_(s64) = COPY $x0 - %1:_(s64) = COPY $x1 - %2:_(s8) = G_TRUNC %0(s64) - %3:_(s8) = G_TRUNC %1(s64) - %4:_(s8), %5:_(s1) = G_SADDO %2, %3 - %6:_(s64) = G_ANYEXT %4(s8) - %7:_(s64) = G_ANYEXT %5(s1) - $x0 = COPY %6(s64) - $x1 = COPY %7(s64) - ... --- name: test_scalar_uaddo_32 diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir index 975f952f084e..b372a32eb7fc 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir @@ -1,6 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # RUN: llc -march=aarch64 -run-pass=legalizer %s -o - | FileCheck %s - --- name: test_scalar_sub_big body: | @@ -93,66 +92,6 @@ body: | $w0 = COPY %2(s32) $w1 = COPY %4(s32) -... ---- -name: test_scalar_usubo_small -body: | - bb.0.entry: - ; CHECK-LABEL: name: test_scalar_usubo_small - ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 - ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 - ; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 255 - ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) - ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[C]] - ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64) - ; CHECK: [[AND1:%[0-9]+]]:_(s32) = G_AND [[TRUNC1]], [[C]] - ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[AND]], [[AND1]] - ; CHECK: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ADD]], [[C]] - ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[ADD]](s32), [[AND2]] - ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32) - ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[ICMP]](s32) - ; CHECK: $x0 = COPY [[ANYEXT]](s64) - ; CHECK: $x1 = COPY [[ANYEXT1]](s64) - %0:_(s64) = COPY $x0 - %1:_(s64) = COPY $x1 - %2:_(s8) = G_TRUNC %0(s64) - %3:_(s8) = G_TRUNC %1(s64) - %4:_(s8), %5:_(s1) = G_UADDO %2, %3 - %6:_(s64) = G_ANYEXT %4(s8) - %7:_(s64) = G_ANYEXT %5(s1) - $x0 = COPY %6(s64) - $x1 = COPY %7(s64) - -... ---- -name: test_scalar_ssubo_small -body: | - bb.0.entry: - ; CHECK-LABEL: name: test_scalar_ssubo_small - ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0 - ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1 - ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64) - ; CHECK: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[TRUNC]], 8 - ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC [[COPY1]](s64) - ; CHECK: [[SEXT_INREG1:%[0-9]+]]:_(s32) = G_SEXT_INREG [[TRUNC1]], 8 - ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[SEXT_INREG]], [[SEXT_INREG1]] - ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ADD]](s32) - ; CHECK: [[SEXT_INREG2:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY2]], 8 - ; CHECK: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ne), [[ADD]](s32), [[SEXT_INREG2]] - ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT [[ADD]](s32) - ; CHECK: [[ANYEXT1:%[0-9]+]]:_(s64) = G_ANYEXT [[ICMP]](s32) - ; CHECK: $x0 = COPY [[ANYEXT]](s64) - ; CHECK: $x1 = COPY [[ANYEXT1]](s64) - %0:_(s64) = COPY $x0 - %1:_(s64) = COPY $x1 - %2:_(s8) = G_TRUNC %0(s64) - %3:_(s8) = G_TRUNC %1(s64) - %4:_(s8), %5:_(s1) = G_SADDO %2, %3 - %6:_(s64) = G_ANYEXT %4(s8) - %7:_(s64) = G_ANYEXT %5(s1) - $x0 = COPY %6(s64) - $x1 = COPY %7(s64) - ... --- name: test_scalar_ssubo_32 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
