Author: Craig Topper Date: 2021-01-18T10:41:36-08:00 New Revision: 2c51bef76cbf0149101b9e7c7c658b4a58657929
URL: https://github.com/llvm/llvm-project/commit/2c51bef76cbf0149101b9e7c7c658b4a58657929 DIFF: https://github.com/llvm/llvm-project/commit/2c51bef76cbf0149101b9e7c7c658b4a58657929.diff LOG: [RISCV] Add a test of vector sadd.overflow to demonstrate intrinsics with multiple scalable vector results. This builds on D94142 where scalable vectors are allowed in structs. I did have to fix one scalable vector issue in the vector type creation for these intrinsics where we used getVectorNumElements instead of ElementCount. Differential Revision: https://reviews.llvm.org/D94149 Added: llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll Modified: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp Removed: ################################################################################ diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 529f3c6fd8e2..54e460f9349c 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -6602,7 +6602,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, EVT OverflowVT = MVT::i1; if (ResultVT.isVector()) OverflowVT = EVT::getVectorVT( - *Context, OverflowVT, ResultVT.getVectorNumElements()); + *Context, OverflowVT, ResultVT.getVectorElementCount()); SDVTList VTs = DAG.getVTList(ResultVT, OverflowVT); setValue(&I, DAG.getNode(Op, sdl, VTs, Op1, Op2)); diff --git a/llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll new file mode 100644 index 000000000000..a0495c001dfe --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll @@ -0,0 +1,23 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -verify-machineinstrs < %s | FileCheck %s + +declare { <vscale x 2 x i32>, <vscale x 2 x i1> } @llvm.sadd.with.overflow.nxv2i32(<vscale x 2 x i32>, <vscale x 2 x i32>) + +define <vscale x 2 x i32> @saddo_nvx2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y) { +; CHECK-LABEL: foo: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu +; CHECK-NEXT: vmslt.vx v25, v17, zero +; CHECK-NEXT: vadd.vv v26, v16, v17 +; CHECK-NEXT: vmslt.vv v27, v26, v16 +; CHECK-NEXT: vsetvli a0, zero, e8,mf4,ta,mu +; CHECK-NEXT: vmxor.mm v0, v25, v27 +; CHECK-NEXT: vsetvli a0, zero, e32,m1,ta,mu +; CHECK-NEXT: vmerge.vim v16, v26, 0, v0 +; CHECK-NEXT: ret + %a = call { <vscale x 2 x i32>, <vscale x 2 x i1> } @llvm.sadd.with.overflow.nxv2i32(<vscale x 2 x i32> %x, <vscale x 2 x i32> %y) + %b = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i1> } %a, 0 + %c = extractvalue { <vscale x 2 x i32>, <vscale x 2 x i1> } %a, 1 + %d = select <vscale x 2 x i1> %c, <vscale x 2 x i32> zeroinitializer, <vscale x 2 x i32> %b + ret <vscale x 2 x i32> %d +} _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
