Author: Hsiangkai Wang Date: 2021-01-15T20:08:51+08:00 New Revision: 619eb14775990d610236288f414a486d86df47cc
URL: https://github.com/llvm/llvm-project/commit/619eb14775990d610236288f414a486d86df47cc DIFF: https://github.com/llvm/llvm-project/commit/619eb14775990d610236288f414a486d86df47cc.diff LOG: [NFC][RISCV] Remove useless code in RISCVRegisterInfo.td. Differential Revision: https://reviews.llvm.org/D94750 Added: Modified: llvm/lib/Target/RISCV/RISCVRegisterInfo.td Removed: ################################################################################ diff --git a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td index fdac1eeb4fe4..99f74bfc2a09 100644 --- a/llvm/lib/Target/RISCV/RISCVRegisterInfo.td +++ b/llvm/lib/Target/RISCV/RISCVRegisterInfo.td @@ -383,10 +383,6 @@ let RegAltNameIndices = [ABIRegAltName] in { def VXRM : RISCVReg<0, "vxrm", ["vxrm"]>; } -class RegisterTypes<list<ValueType> reg_types> { - list<ValueType> types = reg_types; -} - class VReg<list<ValueType> regTypes, dag regList, int Vlmul> : RegisterClass<"RISCV", regTypes, _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
