Author: Thomas Raoux Date: 2021-01-11T12:34:14-08:00 New Revision: c1ae378205db72cd80a52b85b8474077d1aa5b15
URL: https://github.com/llvm/llvm-project/commit/c1ae378205db72cd80a52b85b8474077d1aa5b15 DIFF: https://github.com/llvm/llvm-project/commit/c1ae378205db72cd80a52b85b8474077d1aa5b15.diff LOG: [mlir][vector] Add side-effect information to different load/store ops Differential Revision: https://reviews.llvm.org/D94434 Added: Modified: mlir/include/mlir/Dialect/Vector/VectorOps.td mlir/test/Dialect/Vector/canonicalize.mlir Removed: ################################################################################ diff --git a/mlir/include/mlir/Dialect/Vector/VectorOps.td b/mlir/include/mlir/Dialect/Vector/VectorOps.td index 6bfa89939b04..8bc21b179037 100644 --- a/mlir/include/mlir/Dialect/Vector/VectorOps.td +++ b/mlir/include/mlir/Dialect/Vector/VectorOps.td @@ -1318,7 +1318,7 @@ def Vector_TransferWriteOp : def Vector_MaskedLoadOp : Vector_Op<"maskedload">, - Arguments<(ins AnyMemRef:$base, + Arguments<(ins Arg<AnyMemRef, "", [MemRead]>:$base, Variadic<Index>:$indices, VectorOfRankAndType<[1], [I1]>:$mask, VectorOfRank<[1]>:$pass_thru)>, @@ -1370,7 +1370,7 @@ def Vector_MaskedLoadOp : def Vector_MaskedStoreOp : Vector_Op<"maskedstore">, - Arguments<(ins AnyMemRef:$base, + Arguments<(ins Arg<AnyMemRef, "", [MemWrite]>:$base, Variadic<Index>:$indices, VectorOfRankAndType<[1], [I1]>:$mask, VectorOfRank<[1]>:$value)> { @@ -1418,7 +1418,7 @@ def Vector_MaskedStoreOp : def Vector_GatherOp : Vector_Op<"gather">, - Arguments<(ins AnyMemRef:$base, + Arguments<(ins Arg<AnyMemRef, "", [MemRead]>:$base, VectorOfRankAndType<[1], [AnyInteger]>:$indices, VectorOfRankAndType<[1], [I1]>:$mask, VectorOfRank<[1]>:$pass_thru)>, @@ -1475,7 +1475,7 @@ def Vector_GatherOp : def Vector_ScatterOp : Vector_Op<"scatter">, - Arguments<(ins AnyMemRef:$base, + Arguments<(ins Arg<AnyMemRef, "", [MemWrite]>:$base, VectorOfRankAndType<[1], [AnyInteger]>:$indices, VectorOfRankAndType<[1], [I1]>:$mask, VectorOfRank<[1]>:$value)> { @@ -1531,7 +1531,7 @@ def Vector_ScatterOp : def Vector_ExpandLoadOp : Vector_Op<"expandload">, - Arguments<(ins AnyMemRef:$base, + Arguments<(ins Arg<AnyMemRef, "", [MemRead]>:$base, Variadic<Index>:$indices, VectorOfRankAndType<[1], [I1]>:$mask, VectorOfRank<[1]>:$pass_thru)>, @@ -1586,7 +1586,7 @@ def Vector_ExpandLoadOp : def Vector_CompressStoreOp : Vector_Op<"compressstore">, - Arguments<(ins AnyMemRef:$base, + Arguments<(ins Arg<AnyMemRef, "", [MemWrite]>:$base, Variadic<Index>:$indices, VectorOfRankAndType<[1], [I1]>:$mask, VectorOfRank<[1]>:$value)> { diff --git a/mlir/test/Dialect/Vector/canonicalize.mlir b/mlir/test/Dialect/Vector/canonicalize.mlir index cf4473f15f49..0ff85da85bcb 100644 --- a/mlir/test/Dialect/Vector/canonicalize.mlir +++ b/mlir/test/Dialect/Vector/canonicalize.mlir @@ -677,3 +677,22 @@ func @dead_transfer_op(%arg0 : tensor<4x4xf32>, %arg1 : memref<4x4xf32>, vector<1x4xf32>, tensor<4x4xf32> return } + +// ----- + +// CHECK-LABEL: func @dead_load +// CHECK-NOT: vector.maskedload +// CHECK-NOT: vector.gather +// CHECK-NOT: vector.expandload +// CHECK: return +func @dead_load(%base: memref<?xf32>, %indices: vector<16xi32>, + %mask: vector<16xi1>, %passthru: vector<16xf32>) { + %c0 = constant 0 : index + %0 = vector.maskedload %base[%c0], %mask, %passthru : + memref<?xf32>, vector<16xi1>, vector<16xf32> into vector<16xf32> + %1 = vector.gather %base[%indices], %mask, %passthru : + memref<?xf32>, vector<16xi32>, vector<16xi1>, vector<16xf32> into vector<16xf32> + %2 = vector.expandload %base[%c0], %mask, %passthru : + memref<?xf32>, vector<16xi1>, vector<16xf32> into vector<16xf32> + return +} _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
