Author: Craig Topper Date: 2021-01-08T17:50:28-08:00 New Revision: 7d78875f93a95815640606fa86a9972386cc5d10
URL: https://github.com/llvm/llvm-project/commit/7d78875f93a95815640606fa86a9972386cc5d10 DIFF: https://github.com/llvm/llvm-project/commit/7d78875f93a95815640606fa86a9972386cc5d10.diff LOG: [X86] Remove IntrArgMemOnly from ldmxcsr intrinsic. Since we're leaving this as ReadWrite with the "write" reflecting the update to MXCSR, we shouldn't say it only writes arg memory. Hopefully this fixes the issue reported in post-commit in D93571. Added: Modified: llvm/include/llvm/IR/IntrinsicsX86.td Removed: ################################################################################ diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td index 68b076c594be..bba12139976e 100644 --- a/llvm/include/llvm/IR/IntrinsicsX86.td +++ b/llvm/include/llvm/IR/IntrinsicsX86.td @@ -286,7 +286,7 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". // FIXME: LDMXCSR does not actually write to memory, // but intrinsic properties are generated incorrectly // for IntrReadMem+IntrHasSideEffects. - [/*IntrReadMem,*/ IntrArgMemOnly, IntrHasSideEffects]>; + [/*IntrReadMem, IntrArgMemOnly,*/ IntrHasSideEffects]>; } // Misc. _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
