Author: Qiu Chaofan Date: 2021-01-05T11:35:00+08:00 New Revision: b6c8feb29fce39121884f7e08ec6eb0f58da3fb7
URL: https://github.com/llvm/llvm-project/commit/b6c8feb29fce39121884f7e08ec6eb0f58da3fb7 DIFF: https://github.com/llvm/llvm-project/commit/b6c8feb29fce39121884f7e08ec6eb0f58da3fb7.diff LOG: [NFC] [PowerPC] Remove dead code in BUILD_VECTOR peephole The piece of code tries to use splat+shift to lower build_vector with repeating bit pattern. And immediate field of vector splat is only 5 bits (-16~15). It iterates over them one by one to find which shifts/rotates to number in build_vector. This patch removes code to try matching constant with algebraic right-shift because that's meaningless - any negative number's algebraic right-shift won't produce result smaller than itself. Besides, code (int)((unsigned)i >> j) means logical shift-right in C. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D93937 Added: Modified: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Removed: ################################################################################ diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index e951679f92fa..1b1e9e019476 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -9555,17 +9555,6 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op, return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); } - // vsplti + sra self. - if (SextVal == (int)((unsigned)i >> TypeShiftAmt)) { - SDValue Res = getCanonicalConstSplat(i, SplatSize, MVT::Other, DAG, dl); - static const unsigned IIDs[] = { // Intrinsic to use for each size. - Intrinsic::ppc_altivec_vsrab, Intrinsic::ppc_altivec_vsrah, 0, - Intrinsic::ppc_altivec_vsraw - }; - Res = BuildIntrinsicOp(IIDs[SplatSize-1], Res, Res, DAG, dl); - return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Res); - } - // vsplti + rol self. if (SextVal == (int)(((unsigned)i << TypeShiftAmt) | ((unsigned)i >> (SplatBitSize-TypeShiftAmt)))) { _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
