Author: Reid Kleckner Date: 2020-12-19T17:46:09-08:00 New Revision: 0985a8bfea46272561d2a261b10f308a5841f18a
URL: https://github.com/llvm/llvm-project/commit/0985a8bfea46272561d2a261b10f308a5841f18a DIFF: https://github.com/llvm/llvm-project/commit/0985a8bfea46272561d2a261b10f308a5841f18a.diff LOG: Fix left shift overflow UB in PPC backend on LLP64 platforms Added: Modified: llvm/lib/Target/PowerPC/PPCISelLowering.cpp Removed: ################################################################################ diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 3d9a54305cc6..18e35f5a0850 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -9189,7 +9189,7 @@ static SDValue getCanonicalConstSplat(uint64_t Val, unsigned SplatSize, EVT VT, EVT ReqVT = VT != MVT::Other ? VT : VTys[SplatSize-1]; // For a splat with all ones, turn it to vspltisb 0xFF to canonicalize. - if (Val == ((1LU << (SplatSize * 8)) - 1)) { + if (Val == ((1LLU << (SplatSize * 8)) - 1)) { SplatSize = 1; Val = 0xFF; } _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
