Author: Krzysztof Parzyszek Date: 2020-12-12T11:12:17-06:00 New Revision: 2cf53104711ec0bd8355ea42158f5bdc9400036c
URL: https://github.com/llvm/llvm-project/commit/2cf53104711ec0bd8355ea42158f5bdc9400036c DIFF: https://github.com/llvm/llvm-project/commit/2cf53104711ec0bd8355ea42158f5bdc9400036c.diff LOG: [Hexagon] Create vector masks for scalar loads/stores AlignVectors treats all loaded/stored values as vectors of bytes, and masks as corresponding vectors of booleans, so make getMask produce a 1-element vector for scalars from the start. Added: llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll Modified: llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp Removed: ################################################################################ diff --git a/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp b/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp index cee620e03b00..fb716ef5bbc2 100644 --- a/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp +++ b/llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp @@ -416,7 +416,8 @@ auto AlignVectors::getMask(Value *Val) const -> Value * { int ElemCount = VecTy->getElementCount().getFixedValue(); return HVC.getFullValue(HVC.getBoolTy(ElemCount)); } - return HVC.getFullValue(HVC.getBoolTy()); + // For scalars, return a vector <1 x i1>. + return HVC.getFullValue(HVC.getBoolTy(1)); } auto AlignVectors::getPassThrough(Value *Val) const -> Value * { diff --git a/llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll b/llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll new file mode 100644 index 000000000000..0cb74905a28c --- /dev/null +++ b/llvm/test/CodeGen/Hexagon/autohvx/vector-align-scalar-mask.ll @@ -0,0 +1,30 @@ +; RUN: llc -march=hexagon < %s | FileCheck %s + +; Check that this doesn't crash. +; CHECK: vmem + +target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048" +target triple = "hexagon" + +define dllexport void @f0(i32* %a0, i32 %a1, i32 %a2, <32 x i32> %a3) local_unnamed_addr #0 { +b0: + %v0 = add nuw nsw i32 0, 96 + %v1 = getelementptr inbounds i32, i32* %a0, i32 %v0 + %v2 = bitcast i32* %v1 to <32 x i32>* + %v3 = add nuw nsw i32 0, 225 + %v4 = getelementptr inbounds i32, i32* %a0, i32 %v3 + %v5 = add nuw nsw i32 0, 226 + %v6 = getelementptr inbounds i32, i32* %a0, i32 %v5 + br label %b1 + +b1: ; preds = %b1, %b0 + br i1 undef, label %b2, label %b1 + +b2: ; preds = %b1 + store <32 x i32> %a3, <32 x i32>* %v2, align 4 + store i32 %a1, i32* %v4, align 4 + store i32 %a2, i32* %v6, align 4 + ret void +} + +attributes #0 = { "target-features"="+hvxv66,+hvx-length128b" } _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
