Author: Yuanfang Chen Date: 2020-06-17T15:35:23-07:00 New Revision: 320907788da95386189be35c4480cb35ce896e8e
URL: https://github.com/llvm/llvm-project/commit/320907788da95386189be35c4480cb35ce896e8e DIFF: https://github.com/llvm/llvm-project/commit/320907788da95386189be35c4480cb35ce896e8e.diff LOG: [X86] make sure POP has implicit def/use of stack pointer when materializing 8-bit immediates for minsize Summary: Otherwise PostRA list scheduler may reorder instruction, such as schedule this ''' pushq $0x8 pop %rbx lea 0x2a0(%rsp),%r15 ''' to ''' pushq $0x8 lea 0x2a0(%rsp),%r15 pop %rbx ''' by mistake. The patch is to prevent this to happen by making sure POP has implicit use of SP. Reviewers: craig.topper Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D77031 (cherry picked from commit ece79f47083babcabde3700c67b90ef19967a5b3) Added: Modified: llvm/lib/Target/X86/X86InstrInfo.cpp llvm/test/CodeGen/X86/materialize.ll Removed: ################################################################################ diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 245346d82731..90484241c28c 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -3956,6 +3956,8 @@ static bool ExpandMOVImmSExti8(MachineInstrBuilder &MIB, BuildMI(MBB, I, DL, TII.get(X86::PUSH32i8)).addImm(Imm); MIB->setDesc(TII.get(X86::POP32r)); } + MIB->RemoveOperand(1); + MIB->addImplicitDefUseOperands(*MBB.getParent()); // Build CFI if necessary. MachineFunction &MF = *MBB.getParent(); diff --git a/llvm/test/CodeGen/X86/materialize.ll b/llvm/test/CodeGen/X86/materialize.ll index 429d578feccc..1381a951a01d 100644 --- a/llvm/test/CodeGen/X86/materialize.ll +++ b/llvm/test/CodeGen/X86/materialize.ll @@ -2,6 +2,13 @@ ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+cmov %s -o - | FileCheck %s --check-prefix=CHECK64 ; RUN: llc -mtriple=x86_64-pc-win32 -mattr=+cmov %s -o - | FileCheck %s --check-prefix=CHECKWIN64 +; RUN: llc -mtriple=i686-unknown-linux-gnu -mattr=+cmov %s -o /dev/null \ +; RUN: -print-after postrapseudos -filter-print-funcs pr26023 2>&1 \ +; RUN: | FileCheck %s --check-prefix=OPERAND32 +; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+cmov %s -o /dev/null \ +; RUN: -print-after postrapseudos -filter-print-funcs one64_minsize 2>&1 \ +; RUN: | FileCheck %s --check-prefix=OPERAND64 + define i32 @one32_nooptsize() { entry: ret i32 1 @@ -92,6 +99,12 @@ entry: ; CHECK32: pushl $5 ; CHECK32: popl %ecx ; CHECK32: retl + +; Check push/pop have implicit def/use of $esp +; OPERAND32: PUSH32i8 5, implicit-def $esp, implicit $esp +; OPERAND32-NEXT: CFI_INSTRUCTION adjust_cfa_offset 4 +; OPERAND32-NEXT: renamable $ecx = POP32r implicit-def $esp, implicit $esp +; OPERAND32-NEXT: CFI_INSTRUCTION adjust_cfa_offset -4 } @@ -110,6 +123,13 @@ entry: ; CHECKWIN64-LABEL: one64_minsize: ; CHECKWIN64: movl $1, %eax ; CHECKWIN64-NEXT: retq + +; Check push/pop have implicit def/use of $rsp +; OPERAND64: PUSH64i8 1, implicit-def $rsp, implicit $rsp +; OPERAND64-NEXT: CFI_INSTRUCTION adjust_cfa_offset 8 +; OPERAND64-NEXT: $rax = POP64r implicit-def $rsp, implicit $rsp +; OPERAND64-NEXT: CFI_INSTRUCTION adjust_cfa_offset -8 +; OPERAND64-NEXT: RET 0, $rax } define i32 @minus_one32() optsize { _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
