Author: Fangrui Song Date: 2020-02-04T11:08:20+01:00 New Revision: db51c41a646c79e60cc763f0ecd58494112a32d1
URL: https://github.com/llvm/llvm-project/commit/db51c41a646c79e60cc763f0ecd58494112a32d1 DIFF: https://github.com/llvm/llvm-project/commit/db51c41a646c79e60cc763f0ecd58494112a32d1.diff LOG: [ELF] Decrease alignment of ThunkSection on 64-bit targets from 8 to 4 ThunkSection contains 4-byte instructions on all targets that use thunks. Thunks should not be used in any performance sensitive places, and locality/cache line/instruction fetching arguments should not apply. We use 16 bytes as preferred function alignments for modern PowerPC cores. In any case, 8 is not optimal. Differential Revision: https://reviews.llvm.org/D72819 (cherry picked from commit 870094decfc9fe80c8e0a6405421b7d09b97b02b) Added: Modified: lld/ELF/SyntheticSections.cpp lld/test/ELF/aarch64-call26-thunk.s lld/test/ELF/aarch64-cortex-a53-843419-thunk.s lld/test/ELF/aarch64-jump26-thunk.s lld/test/ELF/aarch64-thunk-pi.s lld/test/ELF/aarch64-thunk-script.s lld/test/ELF/ppc64-dtprel.s lld/test/ELF/ppc64-ifunc.s lld/test/ELF/ppc64-long-branch.s lld/test/ELF/ppc64-tls-gd.s lld/test/ELF/ppc64-toc-restore.s Removed: ################################################################################ diff --git a/lld/ELF/SyntheticSections.cpp b/lld/ELF/SyntheticSections.cpp index 21cbfac46468..cb1706dfdde8 100644 --- a/lld/ELF/SyntheticSections.cpp +++ b/lld/ELF/SyntheticSections.cpp @@ -3454,8 +3454,8 @@ bool ARMExidxSyntheticSection::classof(const SectionBase *d) { } ThunkSection::ThunkSection(OutputSection *os, uint64_t off) - : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, - config->wordsize, ".text.thunk") { + : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS, 4, + ".text.thunk") { this->parent = os; this->outSecOff = off; } diff --git a/lld/test/ELF/aarch64-call26-thunk.s b/lld/test/ELF/aarch64-call26-thunk.s index c4700d523f13..043b5fc1cf9c 100644 --- a/lld/test/ELF/aarch64-call26-thunk.s +++ b/lld/test/ELF/aarch64-call26-thunk.s @@ -12,11 +12,11 @@ _start: // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: _start: -// CHECK-NEXT: 210120: bl #8 +// CHECK-NEXT: 210120: bl #4 // CHECK: __AArch64AbsLongThunk_big: -// CHECK-NEXT: 210128: ldr x16, #8 -// CHECK-NEXT: 21012c: br x16 +// CHECK-NEXT: 210124: ldr x16, #8 +// CHECK-NEXT: 210128: br x16 // CHECK: $d: -// CHECK-NEXT: 210130: 00 00 00 00 .word 0x00000000 -// CHECK-NEXT: 210134: 10 00 00 00 .word 0x00000010 +// CHECK-NEXT: 21012c: 00 00 00 00 .word 0x00000000 +// CHECK-NEXT: 210130: 10 00 00 00 .word 0x00000010 diff --git a/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s b/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s index c1d3d673906d..7330296ac08e 100644 --- a/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s +++ b/lld/test/ELF/aarch64-cortex-a53-843419-thunk.s @@ -40,13 +40,13 @@ t3_ff8_ldr: ldr x0, [x0, :got_lo12:dat] ret -// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 11FFC in unpatched output. -// CHECK: 0000000000011ffc t3_ff8_ldr: +// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at 11FF8 in unpatched output. +// CHECK: 0000000000011ff8 t3_ff8_ldr: // CHECK-NEXT: adrp x0, #134213632 // CHECK-NEXT: ldr x1, [x1] // CHECK-NEXT: b #8 // CHECK-NEXT: ret -// CHECK: 000000000001200c __CortexA53843419_12004: +// CHECK: 0000000000012008 __CortexA53843419_12000: // CHECK-NEXT: ldr x0, [x0, #8] // CHECK-NEXT: b #-8 .section .text.04, "ax", %progbits diff --git a/lld/test/ELF/aarch64-jump26-thunk.s b/lld/test/ELF/aarch64-jump26-thunk.s index 808dbe3c37af..38883b0aa327 100644 --- a/lld/test/ELF/aarch64-jump26-thunk.s +++ b/lld/test/ELF/aarch64-jump26-thunk.s @@ -12,10 +12,10 @@ _start: // CHECK: Disassembly of section .text: // CHECK-EMPTY: // CHECK-NEXT: _start: -// CHECK-NEXT: 210120: b #8 +// CHECK-NEXT: 210120: b #4 // CHECK: __AArch64AbsLongThunk_big: -// CHECK-NEXT: 210128: ldr x16, #8 -// CHECK-NEXT: 21012c: br x16 +// CHECK-NEXT: 210124: ldr x16, #8 +// CHECK-NEXT: 210128: br x16 // CHECK: $d: -// CHECK-NEXT: 210130: 00 00 00 00 .word 0x00000000 -// CHECK-NEXT: 210134: 10 00 00 00 .word 0x00000010 +// CHECK-NEXT: 21012c: 00 00 00 00 .word 0x00000000 +// CHECK-NEXT: 210130: 10 00 00 00 .word 0x00000010 diff --git a/lld/test/ELF/aarch64-thunk-pi.s b/lld/test/ELF/aarch64-thunk-pi.s index 2545f8fb2ea1..362fec62043e 100644 --- a/lld/test/ELF/aarch64-thunk-pi.s +++ b/lld/test/ELF/aarch64-thunk-pi.s @@ -16,7 +16,7 @@ low_target: bl high_target ret // CHECK: low_target: -// CHECK-NEXT: d8: bl #0x18 <__AArch64ADRPThunk_high_target> +// CHECK-NEXT: d8: bl #0x14 <__AArch64ADRPThunk_high_target> // CHECK-NEXT: ret .hidden low_target2 @@ -29,23 +29,23 @@ low_target2: bl .text_high+8 ret // CHECK: low_target2: -// CHECK-NEXT: e0: bl #0x1c <__AArch64ADRPThunk_high_target2> -// CHECK-NEXT: e4: bl #0x24 <__AArch64ADRPThunk_> +// CHECK-NEXT: e0: bl #0x18 <__AArch64ADRPThunk_high_target2> +// CHECK-NEXT: e4: bl #0x20 <__AArch64ADRPThunk_> // CHECK-NEXT: ret // Expect range extension thunks for .text_low // adrp calculation is (PC + signed immediate) & (!0xfff) // CHECK: __AArch64ADRPThunk_high_target: -// CHECK-NEXT: f0: adrp x16, #0x10000000 +// CHECK-NEXT: ec: adrp x16, #0x10000000 // CHECK-NEXT: add x16, x16, #0x40 // CHECK-NEXT: br x16 // CHECK: __AArch64ADRPThunk_high_target2: -// CHECK-NEXT: fc: adrp x16, #0x10000000 +// CHECK-NEXT: f8: adrp x16, #0x10000000 // CHECK-NEXT: add x16, x16, #0x8 // CHECK-NEXT: br x16 /// Identical to the previous one, but for the target .text_high+8. // CHECK: __AArch64ADRPThunk_: -// CHECK-NEXT: 108: adrp x16, #0x10000000 +// CHECK-NEXT: 104: adrp x16, #0x10000000 // CHECK-NEXT: add x16, x16, #0x8 // CHECK-NEXT: br x16 diff --git a/lld/test/ELF/aarch64-thunk-script.s b/lld/test/ELF/aarch64-thunk-script.s index 176c137223b2..b80a21637b42 100644 --- a/lld/test/ELF/aarch64-thunk-script.s +++ b/lld/test/ELF/aarch64-thunk-script.s @@ -30,21 +30,21 @@ high_target: // CHECK: Disassembly of section .text_low: // CHECK-EMPTY: // CHECK-NEXT: _start: -// CHECK-NEXT: 2000: bl #0x10 <__AArch64AbsLongThunk_high_target> -// CHECK-NEXT: 2004: bl #0x1c <__AArch64AbsLongThunk_> +// CHECK-NEXT: 2000: bl #0xc <__AArch64AbsLongThunk_high_target> +// CHECK-NEXT: 2004: bl #0x18 <__AArch64AbsLongThunk_> // CHECK-NEXT: ret // CHECK: __AArch64AbsLongThunk_high_target: -// CHECK-NEXT: 2010: ldr x16, #0x8 +// CHECK-NEXT: 200c: ldr x16, #0x8 // CHECK-NEXT: br x16 // CHECK: $d: -// CHECK-NEXT: 2018: 00 20 00 08 .word 0x08002000 -// CHECK-NEXT: 201c: 00 00 00 00 .word 0x00000000 +// CHECK-NEXT: 2014: 00 20 00 08 .word 0x08002000 +// CHECK-NEXT: 2018: 00 00 00 00 .word 0x00000000 // CHECK: __AArch64AbsLongThunk_: -// CHECK-NEXT: 2020: ldr x16, #0x8 -// CHECK-NEXT: 2024: br x16 +// CHECK-NEXT: 201c: ldr x16, #0x8 +// CHECK-NEXT: 2020: br x16 // CHECK: $d: -// CHECK-NEXT: 2028: 04 20 00 08 .word 0x08002004 -// CHECK-NEXT: 202c: 00 00 00 00 .word 0x00000000 +// CHECK-NEXT: 2024: 04 20 00 08 .word 0x08002004 +// CHECK-NEXT: 2028: 00 00 00 00 .word 0x00000000 // CHECK: Disassembly of section .text_high: // CHECK-EMPTY: // CHECK-NEXT: high_target: diff --git a/lld/test/ELF/ppc64-dtprel.s b/lld/test/ELF/ppc64-dtprel.s index ffd263eb9eae..f9c5bb09d435 100644 --- a/lld/test/ELF/ppc64-dtprel.s +++ b/lld/test/ELF/ppc64-dtprel.s @@ -140,12 +140,12 @@ k: // The got entry for i is at .got+8*1 = 0x4209e0 // i@dtprel = 1024 - 0x8000 = -31744 = 0xffffffffffff8400 // HEX-LE: section '.got': -// HEX-LE-NEXT: 4209d0 d0894200 00000000 00000000 00000000 -// HEX-LE-NEXT: 4209e0 00000000 00000000 +// HEX-LE-NEXT: 4209c8 c8894200 00000000 00000000 00000000 +// HEX-LE-NEXT: 4209d8 00000000 00000000 // HEX-BE: section '.got': -// HEX-BE-NEXT: 4209d0 00000000 004289d0 00000000 00000000 -// HEX-BE-NEXT: 4209e0 00000000 00000000 +// HEX-BE-NEXT: 4209c8 00000000 004289c8 00000000 00000000 +// HEX-BE-NEXT: 4209d8 00000000 00000000 // Dis: test: // Dis: addi 4, 3, -31744 diff --git a/lld/test/ELF/ppc64-ifunc.s b/lld/test/ELF/ppc64-ifunc.s index b8756dac3c47..590f95ff74f8 100644 --- a/lld/test/ELF/ppc64-ifunc.s +++ b/lld/test/ELF/ppc64-ifunc.s @@ -16,9 +16,9 @@ # SYM: Value Size Type Bind Vis Ndx # SYM: 0000000010028298 0 NOTYPE LOCAL HIDDEN 4 .TOC. -# SYM: 0000000010010288 0 FUNC GLOBAL DEFAULT 3 ifunc1 +# SYM: 0000000010010284 0 FUNC GLOBAL DEFAULT 3 ifunc1 # SYM: 0000000010010210 0 IFUNC GLOBAL DEFAULT 2 ifunc2 -# SYM: 0000000010010278 0 FUNC GLOBAL DEFAULT 3 ifunc3 +# SYM: 0000000010010274 0 FUNC GLOBAL DEFAULT 3 ifunc3 # SECTIONS: .plt NOBITS 00000000100302a0 0002a0 000018 00 WA 0 0 8 @@ -27,16 +27,16 @@ # CHECK: _start: # CHECK-NEXT: addis 2, 12, 2 # CHECK-NEXT: addi 2, 2, -32636 -# CHECK-NEXT: 1001021c: bl .+36 +# CHECK-NEXT: 1001021c: bl .+32 # CHECK-NEXT: ld 2, 24(1) -# CHECK-NEXT: 10010224: bl .+48 +# CHECK-NEXT: 10010224: bl .+44 # CHECK-NEXT: ld 2, 24(1) # CHECK-NEXT: addis 3, 2, -2 -# CHECK-NEXT: addi 3, 3, 32752 +# CHECK-NEXT: addi 3, 3, 32748 # CHECK-NEXT: addis 3, 2, -2 -# CHECK-NEXT: addi 3, 3, 32736 +# CHECK-NEXT: addi 3, 3, 32732 -# .plt[0] - .TOC. = 0x100302b0 - 0x100282a8 = (1<<16) - 32760 +# .plt[0] - .TOC. = 0x100302a0 - 0x10028298 = (1<<16) - 32760 # CHECK: __plt_ifunc2: # CHECK-NEXT: std 2, 24(1) # CHECK-NEXT: addis 12, 2, 1 @@ -44,7 +44,7 @@ # CHECK-NEXT: mtctr 12 # CHECK-NEXT: bctr -# .plt[1] - .TOC. = 0x100302b0+8 - 0x100282a8 = (1<<16) - 32752 +# .plt[1] - .TOC. = 0x100302a0+8 - 0x10028298 = (1<<16) - 32752 # CHECK: __plt_ifunc3: # CHECK-NEXT: std 2, 24(1) # CHECK-NEXT: addis 12, 2, 1 @@ -57,19 +57,19 @@ ## ifunc2 and ifunc3 have the same code sequence as their PLT call stubs. # CHECK: Disassembly of section .glink: # CHECK-EMPTY: -# CHECK-NEXT: 0000000010010268 .glink: +# CHECK-NEXT: 0000000010010264 .glink: # CHECK-NEXT: addis 12, 2, 1 # CHECK-NEXT: ld 12, -32760(12) # CHECK-NEXT: mtctr 12 # CHECK-NEXT: bctr # CHECK-EMPTY: -# CHECK-NEXT: 0000000010010278 ifunc3: +# CHECK-NEXT: 0000000010010274 ifunc3: # CHECK-NEXT: addis 12, 2, 1 # CHECK-NEXT: ld 12, -32752(12) # CHECK-NEXT: mtctr 12 # CHECK-NEXT: bctr # CHECK-EMPTY: -# CHECK-NEXT: 0000000010010288 ifunc1: +# CHECK-NEXT: 0000000010010284 ifunc1: # CHECK-NEXT: addis 12, 2, 1 # CHECK-NEXT: ld 12, -32744(12) # CHECK-NEXT: mtctr 12 diff --git a/lld/test/ELF/ppc64-long-branch.s b/lld/test/ELF/ppc64-long-branch.s index cd90d6f8f64c..5d3ee00d7984 100644 --- a/lld/test/ELF/ppc64-long-branch.s +++ b/lld/test/ELF/ppc64-long-branch.s @@ -64,9 +64,9 @@ blr # CHECK-NEXT: 2002000: addis 2, 12, 1 # CHECK-NEXT: addi 2, 2, -32728 # CHECK-NEXT: bl .-33554432 -# CHECK-NEXT: bl .+12 +# CHECK-NEXT: bl .+8 # CHECK: __long_branch_: -# CHECK-NEXT: 2002018: addis 12, 2, 0 +# CHECK-NEXT: 2002014: addis 12, 2, 0 # CHECK-NEXT: ld 12, -32744(12) # CHECK-NEXT: mtctr 12 # CHECK-NEXT: bctr diff --git a/lld/test/ELF/ppc64-tls-gd.s b/lld/test/ELF/ppc64-tls-gd.s index 8c5cd5904e11..bb90a7f3943f 100644 --- a/lld/test/ELF/ppc64-tls-gd.s +++ b/lld/test/ELF/ppc64-tls-gd.s @@ -16,29 +16,29 @@ # RUN: llvm-objdump -d --no-show-raw-insn %t | FileCheck --check-prefix=IE %s # GD-REL: .rela.dyn { -# GD-REL-NEXT: 0x20540 R_PPC64_DTPMOD64 a 0x0 -# GD-REL-NEXT: 0x20548 R_PPC64_DTPREL64 a 0x0 -# GD-REL-NEXT: 0x20550 R_PPC64_DTPMOD64 b 0x0 -# GD-REL-NEXT: 0x20558 R_PPC64_DTPREL64 b 0x0 -# GD-REL-NEXT: 0x20560 R_PPC64_DTPMOD64 c 0x0 -# GD-REL-NEXT: 0x20568 R_PPC64_DTPREL64 c 0x0 +# GD-REL-NEXT: 0x20538 R_PPC64_DTPMOD64 a 0x0 +# GD-REL-NEXT: 0x20540 R_PPC64_DTPREL64 a 0x0 +# GD-REL-NEXT: 0x20548 R_PPC64_DTPMOD64 b 0x0 +# GD-REL-NEXT: 0x20550 R_PPC64_DTPREL64 b 0x0 +# GD-REL-NEXT: 0x20558 R_PPC64_DTPMOD64 c 0x0 +# GD-REL-NEXT: 0x20560 R_PPC64_DTPREL64 c 0x0 # GD-REL-NEXT: } ## &DTPMOD(a) - .TOC. = &.got[0] - (.got+0x8000) = -32768 # GD: addis 3, 2, 0 # GD-NEXT: addi 3, 3, -32768 -# GD-NEXT: bl .+40 +# GD-NEXT: bl .+36 # GD-NEXT: ld 2, 24(1) ## &DTPMOD(b) - .TOC. = &.got[2] - (.got+0x8000) = -32752 # GD-NEXT: addis 3, 2, 0 # GD-NEXT: addi 3, 3, -32752 -# GD-NEXT: bl .+24 +# GD-NEXT: bl .+20 # GD-NEXT: ld 2, 24(1) ## &DTPMOD(b) - .TOC. = &.got[4] - (.got+0x8000) = -32736 # GD-NEXT: li 3, -32736 -# GD-NEXT: bl .+12 +# GD-NEXT: bl .+8 # GD-NEXT: ld 2, 24(1) # NOREL: no relocations diff --git a/lld/test/ELF/ppc64-toc-restore.s b/lld/test/ELF/ppc64-toc-restore.s index ddc0d4a012b9..7f68a50e8353 100644 --- a/lld/test/ELF/ppc64-toc-restore.s +++ b/lld/test/ELF/ppc64-toc-restore.s @@ -29,7 +29,7 @@ _start: nop bl bar_local // CHECK-LABEL: _start: -// CHECK-NEXT: 100102c8: bl .+64 +// CHECK-NEXT: 100102c8: bl .+60 // CHECK-NEXT: 100102cc: ld 2, 24(1) // CHECK-NEXT: 100102d0: bl .-16 // CHECK-EMPTY: @@ -61,5 +61,5 @@ last: bl foo nop // CHECK-LABEL: last: -// CHECK-NEXT: 100102e4: bl .+36 +// CHECK-NEXT: 100102e4: bl .+32 // CHECK-NEXT: 100102e8: ld 2, 24(1) _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits