Author: Thomas Lively Date: 2019-11-20T13:08:42-08:00 New Revision: 7185aa61a7aa0f0402322aededb68854c4d4f46e
URL: https://github.com/llvm/llvm-project/commit/7185aa61a7aa0f0402322aededb68854c4d4f46e DIFF: https://github.com/llvm/llvm-project/commit/7185aa61a7aa0f0402322aededb68854c4d4f46e.diff LOG: [WebAssembly] Fix miscompile of select with and Summary: Rolls back the remaining bad optimizations introduced in eb15d00193f. Some of them were already rolled back in e661f946a7db and this finishes the job. Fixes https://bugs.llvm.org/show_bug.cgi?id=44012. Reviewers: dschuff, aheejin Subscribers: sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70347 (cherry picked from commit 194d7ec081c31ee4ed82bfa3cade4ef30afab912) Added: Modified: llvm/lib/Target/WebAssembly/WebAssemblyInstrFloat.td llvm/test/CodeGen/WebAssembly/select.ll Removed: ################################################################################ diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrFloat.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrFloat.td index 5c9b34f44734..104f5f7d2e68 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrFloat.td +++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrFloat.td @@ -121,10 +121,3 @@ def : Pat<(select (i32 (seteq I32:$cond, 0)), F32:$lhs, F32:$rhs), (SELECT_F32 F32:$rhs, F32:$lhs, I32:$cond)>; def : Pat<(select (i32 (seteq I32:$cond, 0)), F64:$lhs, F64:$rhs), (SELECT_F64 F64:$rhs, F64:$lhs, I32:$cond)>; - -// The legalizer inserts an unnecessary `and 1` to make input conform -// to getBooleanContents, which we can lower away. -def : Pat<(select (i32 (and I32:$cond, 1)), F32:$lhs, F32:$rhs), - (SELECT_F32 F32:$lhs, F32:$rhs, I32:$cond)>; -def : Pat<(select (i32 (and I32:$cond, 1)), F64:$lhs, F64:$rhs), - (SELECT_F64 F64:$lhs, F64:$rhs, I32:$cond)>; diff --git a/llvm/test/CodeGen/WebAssembly/select.ll b/llvm/test/CodeGen/WebAssembly/select.ll index ef18d9183e50..5bf607cb21af 100644 --- a/llvm/test/CodeGen/WebAssembly/select.ll +++ b/llvm/test/CodeGen/WebAssembly/select.ll @@ -17,10 +17,10 @@ define i32 @select_i32_bool(i1 zeroext %a, i32 %b, i32 %c) { ; CHECK-LABEL: select_i32_bool_nozext: ; CHECK-NEXT: .functype select_i32_bool_nozext (i32, i32, i32) -> (i32){{$}} -; SLOW-NEXT: i32.const $push0=, 1{{$}} -; SLOW-NEXT: i32.and $push1=, $0, $pop0{{$}} -; SLOW-NEXT: i32.select $push2=, $1, $2, $pop1{{$}} -; SLOW-NEXT: return $pop2{{$}} +; CHECK-NEXT: i32.const $push0=, 1{{$}} +; CHECK-NEXT: i32.and $push1=, $0, $pop0{{$}} +; CHECK-NEXT: i32.select $push2=, $1, $2, $pop1{{$}} +; CHECK-NEXT: return $pop2{{$}} define i32 @select_i32_bool_nozext(i1 %a, i32 %b, i32 %c) { %cond = select i1 %a, i32 %b, i32 %c ret i32 %cond @@ -57,10 +57,10 @@ define i64 @select_i64_bool(i1 zeroext %a, i64 %b, i64 %c) { ; CHECK-LABEL: select_i64_bool_nozext: ; CHECK-NEXT: .functype select_i64_bool_nozext (i32, i64, i64) -> (i64){{$}} -; SLOW-NEXT: i32.const $push0=, 1{{$}} -; SLOW-NEXT: i32.and $push1=, $0, $pop0{{$}} -; SLOW-NEXT: i64.select $push2=, $1, $2, $pop1{{$}} -; SLOW-NEXT: return $pop2{{$}} +; CHECK-NEXT: i32.const $push0=, 1{{$}} +; CHECK-NEXT: i32.and $push1=, $0, $pop0{{$}} +; CHECK-NEXT: i64.select $push2=, $1, $2, $pop1{{$}} +; CHECK-NEXT: return $pop2{{$}} define i64 @select_i64_bool_nozext(i1 %a, i64 %b, i64 %c) { %cond = select i1 %a, i64 %b, i64 %c ret i64 %cond @@ -97,8 +97,10 @@ define float @select_f32_bool(i1 zeroext %a, float %b, float %c) { ; CHECK-LABEL: select_f32_bool_nozext: ; CHECK-NEXT: .functype select_f32_bool_nozext (i32, f32, f32) -> (f32){{$}} -; SLOW-NEXT: f32.select $push0=, $1, $2, $0{{$}} -; SLOW-NEXT: return $pop0{{$}} +; CHECK-NEXT: i32.const $push0=, 1{{$}} +; CHECK-NEXT: i32.and $push1=, $0, $pop0{{$}} +; CHECK-NEXT: f32.select $push2=, $1, $2, $pop1{{$}} +; CHECK-NEXT: return $pop2{{$}} define float @select_f32_bool_nozext(i1 %a, float %b, float %c) { %cond = select i1 %a, float %b, float %c ret float %cond @@ -135,8 +137,10 @@ define double @select_f64_bool(i1 zeroext %a, double %b, double %c) { ; CHECK-LABEL: select_f64_bool_nozext: ; CHECK-NEXT: .functype select_f64_bool_nozext (i32, f64, f64) -> (f64){{$}} -; SLOW-NEXT: f64.select $push0=, $1, $2, $0{{$}} -; SLOW-NEXT: return $pop0{{$}} +; CHECK-NEXT: i32.const $push0=, 1{{$}} +; CHECK-NEXT: i32.and $push1=, $0, $pop0{{$}} +; CHECK-NEXT: f64.select $push2=, $1, $2, $pop1{{$}} +; CHECK-NEXT: return $pop2{{$}} define double @select_f64_bool_nozext(i1 %a, double %b, double %c) { %cond = select i1 %a, double %b, double %c ret double %cond @@ -162,15 +166,56 @@ define double @select_f64_ne(i32 %a, double %b, double %c) { ret double %cond } -; CHECK-LABEL: pr40805: -; CHECK-NEXT: .functype pr40805 (i32, i32, i32) -> (i32){{$}} +; CHECK-LABEL: pr40805_i32: +; CHECK-NEXT: .functype pr40805_i32 (i32, i32, i32) -> (i32){{$}} ; SLOW-NEXT: i32.const $push0=, 1{{$}} ; SLOW-NEXT: i32.and $push1=, $0, $pop0{{$}} ; SLOW-NEXT: i32.select $push2=, $1, $2, $pop1{{$}} ; SLOW-NEXT: return $pop2{{$}} -define i32 @pr40805(i32 %x, i32 %y, i32 %z) { +define i32 @pr40805_i32(i32 %x, i32 %y, i32 %z) { %a = and i32 %x, 1 %b = icmp ne i32 %a, 0 %c = select i1 %b, i32 %y, i32 %z ret i32 %c } + +; CHECK-LABEL: pr40805_i64: +; CHECK-NEXT: .functype pr40805_i64 (i64, i64, i64) -> (i64){{$}} +; SLOW-NEXT: i32.wrap_i64 $push0=, $0{{$}} +; SLOW-NEXT: i32.const $push1=, 1{{$}} +; SLOW-NEXT: i32.and $push2=, $pop0, $pop1{{$}} +; SLOW-NEXT: i64.select $push3=, $1, $2, $pop2{{$}} +; SLOW-NEXT: return $pop3{{$}} +define i64 @pr40805_i64(i64 %x, i64 %y, i64 %z) { + %a = and i64 %x, 1 + %b = icmp ne i64 %a, 0 + %c = select i1 %b, i64 %y, i64 %z + ret i64 %c +} + +; CHECK-LABEL: pr44012_i32: +; CHECK-NEXT: .functype pr44012_i32 (i32, f32, f32) -> (f32){{$}} +; SLOW-NEXT: i32.const $push0=, 1{{$}} +; SLOW-NEXT: i32.and $push1=, $0, $pop0{{$}} +; SLOW-NEXT: f32.select $push2=, $1, $2, $pop1{{$}} +; SLOW-NEXT: return $pop2{{$}} +define float @pr44012_i32(i32 %x, float %y, float %z) { + %a = and i32 %x, 1 + %b = icmp ne i32 %a, 0 + %c = select i1 %b, float %y, float %z + ret float %c +} + +; CHECK-LABEL: pr44012_i64: +; CHECK-NEXT: .functype pr44012_i64 (i64, f32, f32) -> (f32){{$}} +; SLOW-NEXT: i32.wrap_i64 $push0=, $0{{$}} +; SLOW-NEXT: i32.const $push1=, 1{{$}} +; SLOW-NEXT: i32.and $push2=, $pop0, $pop1{{$}} +; SLOW-NEXT: f32.select $push3=, $1, $2, $pop2{{$}} +; SLOW-NEXT: return $pop3{{$}} +define float @pr44012_i64(i64 %x, float %y, float %z) { + %a = and i64 %x, 1 + %b = icmp ne i64 %a, 0 + %c = select i1 %b, float %y, float %z + ret float %c +} _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
