Author: hans
Date: Thu Aug 29 03:04:58 2019
New Revision: 370318
URL: http://llvm.org/viewvc/llvm-project?rev=370318&view=rev
Log:
ReleaseNotes from Sam Parker
Modified:
llvm/branches/release_90/docs/ReleaseNotes.rst
Modified: llvm/branches/release_90/docs/ReleaseNotes.rst
URL:
http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/docs/ReleaseNotes.rst?rev=370318&r1=370317&r2=370318&view=diff
==============================================================================
--- llvm/branches/release_90/docs/ReleaseNotes.rst (original)
+++ llvm/branches/release_90/docs/ReleaseNotes.rst Thu Aug 29 03:04:58 2019
@@ -60,6 +60,9 @@ Non-comprehensive list of changes in thi
* The ORCv1 JIT API has been deprecated. Please see
`Transitioning from ORCv1 to ORCv2
<ORCv2.html#transitioning-from-orcv1-to-orcv2>`_.
+* Support for target-independent hardware loops in IR has been added, with
+ PowerPC and Arm implementations.
+
.. NOTE
If you would like to document a larger change, then you can add a
subsection about it right here. You can copy the following boilerplate
@@ -126,6 +129,8 @@ Changes to the ARM Backend
tune for cores where this gives a benefit too: Cortex-M3, SC300, Cortex-M33
and Cortex-M35P.
+* Code generation support for M-profile low-overhead loops.
+
Changes to the MIPS Target
--------------------------
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