Author: hans Date: Tue Aug 20 02:52:26 2019 New Revision: 369357 URL: http://llvm.org/viewvc/llvm-project?rev=369357&view=rev Log: Merging r369084: ------------------------------------------------------------------------ r369084 | ctopper | 2019-08-16 06:47:44 +0200 (Fri, 16 Aug 2019) | 5 lines
[X86] Manually reimplement getTargetInsertSubreg in X86DAGToDAGISel::matchBitExtract so we can call insertDAGNode on the target constant. This is needed to maintain the topological sort order. Fixes PR42992. ------------------------------------------------------------------------ Added: llvm/branches/release_90/test/CodeGen/X86/pr42992.ll - copied unchanged from r369084, llvm/trunk/test/CodeGen/X86/pr42992.ll Modified: llvm/branches/release_90/ (props changed) llvm/branches/release_90/lib/Target/X86/X86ISelDAGToDAG.cpp Propchange: llvm/branches/release_90/ ------------------------------------------------------------------------------ --- svn:mergeinfo (original) +++ svn:mergeinfo Tue Aug 20 02:52:26 2019 @@ -1,3 +1,3 @@ /llvm/branches/Apple/Pertwee:110850,110961 /llvm/branches/type-system-rewrite:133420-134817 -/llvm/trunk:155241,366431,366481,366487,366527,366570,366660,366868,366925,367019,367030,367062,367084,367124,367215,367292,367304,367306,367314,367340-367341,367394,367396,367398,367403,367417,367662,367750,367753,367846-367847,367898,367941,368004,368230,368300,368315,368324,368477-368478,368517-368519,368554,368572,368873,369011,369026,369097,369168 +/llvm/trunk:155241,366431,366481,366487,366527,366570,366660,366868,366925,367019,367030,367062,367084,367124,367215,367292,367304,367306,367314,367340-367341,367394,367396,367398,367403,367417,367662,367750,367753,367846-367847,367898,367941,368004,368230,368300,368315,368324,368477-368478,368517-368519,368554,368572,368873,369011,369026,369084,369097,369168 Modified: llvm/branches/release_90/lib/Target/X86/X86ISelDAGToDAG.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_90/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=369357&r1=369356&r2=369357&view=diff ============================================================================== --- llvm/branches/release_90/lib/Target/X86/X86ISelDAGToDAG.cpp (original) +++ llvm/branches/release_90/lib/Target/X86/X86ISelDAGToDAG.cpp Tue Aug 20 02:52:26 2019 @@ -3333,8 +3333,12 @@ bool X86DAGToDAGISel::matchBitExtract(SD SDValue ImplDef = SDValue( CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, DL, MVT::i32), 0); insertDAGNode(*CurDAG, SDValue(Node, 0), ImplDef); - NBits = CurDAG->getTargetInsertSubreg(X86::sub_8bit, DL, MVT::i32, ImplDef, - NBits); + + SDValue SRIdxVal = CurDAG->getTargetConstant(X86::sub_8bit, DL, MVT::i32); + insertDAGNode(*CurDAG, SDValue(Node, 0), SRIdxVal); + NBits = SDValue( + CurDAG->getMachineNode(TargetOpcode::INSERT_SUBREG, DL, MVT::i32, ImplDef, + NBits, SRIdxVal), 0); insertDAGNode(*CurDAG, SDValue(Node, 0), NBits); if (Subtarget->hasBMI2()) { _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits