Author: hans Date: Mon Aug 21 12:54:09 2017 New Revision: 311369 URL: http://llvm.org/viewvc/llvm-project?rev=311369&view=rev Log: Merging r311258: ------------------------------------------------------------------------ r311258 | mstorsjo | 2017-08-19 12:47:48 -0700 (Sat, 19 Aug 2017) | 9 lines
[ARM] Check the right order for halves of VZIP/VUZP if both parts are used This is the exact same fix as in SVN r247254. In that commit, the fix was applied only for isVTRNMask and isVTRN_v_undef_Mask, but the same issue is present for VZIP/VUZP as well. This fixes PR33921. Differential Revision: https://reviews.llvm.org/D36899 ------------------------------------------------------------------------ Modified: llvm/branches/release_50/ (props changed) llvm/branches/release_50/lib/Target/ARM/ARMISelLowering.cpp llvm/branches/release_50/test/CodeGen/ARM/vzip.ll Propchange: llvm/branches/release_50/ ------------------------------------------------------------------------------ --- svn:mergeinfo (original) +++ svn:mergeinfo Mon Aug 21 12:54:09 2017 @@ -1,3 +1,3 @@ /llvm/branches/Apple/Pertwee:110850,110961 /llvm/branches/type-system-rewrite:133420-134817 -/llvm/trunk:155241,308483-308484,308503,308808,308813,308847,308891,308906,308950,308963,308978,308986,309044,309071,309113,309120,309122,309140,309227,309302,309321,309323,309325,309330,309343,309353,309355,309422,309481,309483,309495,309555,309561,309594,309614,309651,309744,309758,309849,309928,309930,309945,310066,310071,310190,310240-310242,310250,310253,310262,310267,310481,310492,310498,310510,310534,310552,310604,310779,310784,310796,310842,310906,310926,310939,310979,310988,310991,311068,311087 +/llvm/trunk:155241,308483-308484,308503,308808,308813,308847,308891,308906,308950,308963,308978,308986,309044,309071,309113,309120,309122,309140,309227,309302,309321,309323,309325,309330,309343,309353,309355,309422,309481,309483,309495,309555,309561,309594,309614,309651,309744,309758,309849,309928,309930,309945,310066,310071,310190,310240-310242,310250,310253,310262,310267,310481,310492,310498,310510,310534,310552,310604,310779,310784,310796,310842,310906,310926,310939,310979,310988,310991,311068,311087,311258 Modified: llvm/branches/release_50/lib/Target/ARM/ARMISelLowering.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_50/lib/Target/ARM/ARMISelLowering.cpp?rev=311369&r1=311368&r2=311369&view=diff ============================================================================== --- llvm/branches/release_50/lib/Target/ARM/ARMISelLowering.cpp (original) +++ llvm/branches/release_50/lib/Target/ARM/ARMISelLowering.cpp Mon Aug 21 12:54:09 2017 @@ -5901,7 +5901,10 @@ static bool isVUZPMask(ArrayRef<int> M, return false; for (unsigned i = 0; i < M.size(); i += NumElts) { - WhichResult = M[i] == 0 ? 0 : 1; + if (M.size() == NumElts * 2) + WhichResult = i / NumElts; + else + WhichResult = M[i] == 0 ? 0 : 1; for (unsigned j = 0; j < NumElts; ++j) { if (M[i+j] >= 0 && (unsigned) M[i+j] != 2 * j + WhichResult) return false; @@ -5932,7 +5935,10 @@ static bool isVUZP_v_undef_Mask(ArrayRef unsigned Half = NumElts / 2; for (unsigned i = 0; i < M.size(); i += NumElts) { - WhichResult = M[i] == 0 ? 0 : 1; + if (M.size() == NumElts * 2) + WhichResult = i / NumElts; + else + WhichResult = M[i] == 0 ? 0 : 1; for (unsigned j = 0; j < NumElts; j += Half) { unsigned Idx = WhichResult; for (unsigned k = 0; k < Half; ++k) { @@ -5972,7 +5978,10 @@ static bool isVZIPMask(ArrayRef<int> M, return false; for (unsigned i = 0; i < M.size(); i += NumElts) { - WhichResult = M[i] == 0 ? 0 : 1; + if (M.size() == NumElts * 2) + WhichResult = i / NumElts; + else + WhichResult = M[i] == 0 ? 0 : 1; unsigned Idx = WhichResult * NumElts / 2; for (unsigned j = 0; j < NumElts; j += 2) { if ((M[i+j] >= 0 && (unsigned) M[i+j] != Idx) || @@ -6005,7 +6014,10 @@ static bool isVZIP_v_undef_Mask(ArrayRef return false; for (unsigned i = 0; i < M.size(); i += NumElts) { - WhichResult = M[i] == 0 ? 0 : 1; + if (M.size() == NumElts * 2) + WhichResult = i / NumElts; + else + WhichResult = M[i] == 0 ? 0 : 1; unsigned Idx = WhichResult * NumElts / 2; for (unsigned j = 0; j < NumElts; j += 2) { if ((M[i+j] >= 0 && (unsigned) M[i+j] != Idx) || Modified: llvm/branches/release_50/test/CodeGen/ARM/vzip.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_50/test/CodeGen/ARM/vzip.ll?rev=311369&r1=311368&r2=311369&view=diff ============================================================================== --- llvm/branches/release_50/test/CodeGen/ARM/vzip.ll (original) +++ llvm/branches/release_50/test/CodeGen/ARM/vzip.ll Mon Aug 21 12:54:09 2017 @@ -282,6 +282,25 @@ entry: ret <8 x i16> %0 } +; NOTE: The mask here looks like something that could be done with a vzip, +; but which the current handling of two-result vzip can't do - thus ending up +; as a vtrn. +define <8 x i16> @vzip_lower_shufflemask_undef_rev(<4 x i16>* %A, <4 x i16>* %B) { +; CHECK-LABEL: vzip_lower_shufflemask_undef_rev: +; CHECK: @ BB#0: @ %entry +; CHECK-NEXT: vldr d16, [r1] +; CHECK-NEXT: vldr d19, [r0] +; CHECK-NEXT: vtrn.16 d19, d16 +; CHECK-NEXT: vmov r0, r1, d18 +; CHECK-NEXT: vmov r2, r3, d19 +; CHECK-NEXT: mov pc, lr +entry: + %tmp1 = load <4 x i16>, <4 x i16>* %A + %tmp2 = load <4 x i16>, <4 x i16>* %B + %0 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 4, i32 undef, i32 undef> + ret <8 x i16> %0 +} + define <4 x i32> @vzip_lower_shufflemask_zeroed(<2 x i32>* %A) { ; CHECK-LABEL: vzip_lower_shufflemask_zeroed: ; CHECK: @ BB#0: @ %entry _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
