Author: joerg Date: Wed Jan 18 18:19:28 2017 New Revision: 292453 URL: http://llvm.org/viewvc/llvm-project?rev=292453&view=rev Log: Merging r292244: ------------------------------------------------------------------------ r292244 | joerg | 2017-01-17 20:29:15 +0100 (Di, 17. Jan 2017) | 2 Zeilen
Remove an overeager assert from r288844. ------------------------------------------------------------------------ Modified: llvm/branches/release_40/lib/Target/X86/X86Subtarget.cpp llvm/branches/release_40/test/CodeGen/X86/slow-pmulld.ll Modified: llvm/branches/release_40/lib/Target/X86/X86Subtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_40/lib/Target/X86/X86Subtarget.cpp?rev=292453&r1=292452&r2=292453&view=diff ============================================================================== --- llvm/branches/release_40/lib/Target/X86/X86Subtarget.cpp (original) +++ llvm/branches/release_40/lib/Target/X86/X86Subtarget.cpp Wed Jan 18 18:19:28 2017 @@ -232,9 +232,6 @@ void X86Subtarget::initSubtargetFeatures else if (isTargetDarwin() || isTargetLinux() || isTargetSolaris() || isTargetKFreeBSD() || In64BitMode) stackAlignment = 16; - - assert((!isPMULLDSlow() || hasSSE41()) && - "Feature Slow PMULLD can only be set on a subtarget with SSE4.1"); } void X86Subtarget::initializeEnvironment() { Modified: llvm/branches/release_40/test/CodeGen/X86/slow-pmulld.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_40/test/CodeGen/X86/slow-pmulld.ll?rev=292453&r1=292452&r2=292453&view=diff ============================================================================== --- llvm/branches/release_40/test/CodeGen/X86/slow-pmulld.ll (original) +++ llvm/branches/release_40/test/CodeGen/X86/slow-pmulld.ll Wed Jan 18 18:19:28 2017 @@ -4,6 +4,9 @@ ; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE4-32 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE4-64 +; Make sure that the slow-pmulld feature can be used without SSE4.1. +; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont -mattr=-sse4.1 + define <4 x i32> @foo(<4 x i8> %A) { ; CHECK32-LABEL: foo: ; CHECK32: # BB#0: _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits