Author: hans Date: Mon Aug 22 15:27:42 2016 New Revision: 279468 URL: http://llvm.org/viewvc/llvm-project?rev=279468&view=rev Log: Fix gather-root.ll SLP vectorizer test to not expose UB.
The undefined behaviour (signed integer overflow) is not a regression in itself as it was already there, but the test exposing it is a regression compared to rc1, i.e. the lit tests no longer run ubsan-clean. This commit fixes the test based on Matt's change in r279125 to not expose the undefined behaviour. Modified: llvm/branches/release_39/test/Transforms/SLPVectorizer/AArch64/gather-root.ll Modified: llvm/branches/release_39/test/Transforms/SLPVectorizer/AArch64/gather-root.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_39/test/Transforms/SLPVectorizer/AArch64/gather-root.ll?rev=279468&r1=279467&r2=279468&view=diff ============================================================================== --- llvm/branches/release_39/test/Transforms/SLPVectorizer/AArch64/gather-root.ll (original) +++ llvm/branches/release_39/test/Transforms/SLPVectorizer/AArch64/gather-root.ll Mon Aug 22 15:27:42 2016 @@ -8,7 +8,6 @@ target triple = "aarch64--linux-gnu" ; DEFAULT-LABEL: @PR28330( ; DEFAULT: %tmp17 = phi i32 [ %tmp34, %for.body ], [ 0, %entry ] -; DEFAULT: %tmp18 = phi i32 [ %tmp35, %for.body ], [ %n, %entry ] ; DEFAULT: %[[S0:.+]] = select <8 x i1> %1, <8 x i32> <i32 -720, i32 -720, i32 -720, i32 -720, i32 -720, i32 -720, i32 -720, i32 -720>, <8 x i32> <i32 -80, i32 -80, i32 -80, i32 -80, i32 -80, i32 -80, i32 -80, i32 -80> ; DEFAULT: %[[R0:.+]] = shufflevector <8 x i32> %[[S0]], <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef> ; DEFAULT: %[[R1:.+]] = add <8 x i32> %[[S0]], %[[R0]] @@ -21,7 +20,6 @@ target triple = "aarch64--linux-gnu" ; ; GATHER-LABEL: @PR28330( ; GATHER: %tmp17 = phi i32 [ %tmp34, %for.body ], [ 0, %entry ] -; GATHER: %tmp18 = phi i32 [ %tmp35, %for.body ], [ %n, %entry ] ; GATHER: %tmp19 = select i1 %tmp1, i32 -720, i32 -80 ; GATHER: %tmp21 = select i1 %tmp3, i32 -720, i32 -80 ; GATHER: %tmp23 = select i1 %tmp5, i32 -720, i32 -80 @@ -69,7 +67,6 @@ entry: for.body: %tmp17 = phi i32 [ %tmp34, %for.body ], [ 0, %entry ] - %tmp18 = phi i32 [ %tmp35, %for.body ], [ %n, %entry ] %tmp19 = select i1 %tmp1, i32 -720, i32 -80 %tmp20 = add i32 %tmp17, %tmp19 %tmp21 = select i1 %tmp3, i32 -720, i32 -80 @@ -86,10 +83,5 @@ for.body: %tmp32 = add i32 %tmp30, %tmp31 %tmp33 = select i1 %tmp15, i32 -720, i32 -80 %tmp34 = add i32 %tmp32, %tmp33 - %tmp35 = add nsw i32 %tmp18, -1 - %tmp36 = icmp eq i32 %tmp35, 0 - br i1 %tmp36, label %for.end, label %for.body - -for.end: - ret void + br label %for.body } _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits