Author: dsanders Date: Sat May 28 11:08:13 2016 New Revision: 271122 URL: http://llvm.org/viewvc/llvm-project?rev=271122&view=rev Log: Merging r259039: ------------------------------------------------------------------------ r259039 | zjovanovic | 2016-01-28 11:08:03 +0000 (Thu, 28 Jan 2016) | 9 lines
[mips][microMIPS] Disable FastISel for microMIPS Author: milena.vujosevic.janicic Reviewers: dsanders FastIsel is not supported for microMIPS, thus it needs to be disabled. Test micromips-zero-mat-uses.ll is deleted since the tested sequence of instructions is not generated for microMIPS without FastISel. Differential Revision: http://reviews.llvm.org/D15892 ------------------------------------------------------------------------ Removed: llvm/branches/release_38/test/CodeGen/Mips/micromips-zero-mat-uses.ll Modified: llvm/branches/release_38/lib/Target/Mips/MipsFastISel.cpp llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll Modified: llvm/branches/release_38/lib/Target/Mips/MipsFastISel.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/Mips/MipsFastISel.cpp?rev=271122&r1=271121&r2=271122&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/Mips/MipsFastISel.cpp (original) +++ llvm/branches/release_38/lib/Target/Mips/MipsFastISel.cpp Sat May 28 11:08:13 2016 @@ -192,7 +192,8 @@ public: TII(*Subtarget->getInstrInfo()), TLI(*Subtarget->getTargetLowering()) { MFI = funcInfo.MF->getInfo<MipsFunctionInfo>(); Context = &funcInfo.Fn->getContext(); - bool ISASupported = !Subtarget->hasMips32r6() && Subtarget->hasMips32(); + bool ISASupported = !Subtarget->hasMips32r6() && + !Subtarget->inMicroMipsMode() && Subtarget->hasMips32(); TargetSupported = ISASupported && (TM.getRelocationModel() == Reloc::PIC_) && (static_cast<const MipsTargetMachine &>(TM).getABI().IsO32()); Modified: llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll?rev=271122&r1=271121&r2=271122&view=diff ============================================================================== --- llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll (original) +++ llvm/branches/release_38/test/CodeGen/Mips/Fast-ISel/check-disabled-mcpus.ll Sat May 28 11:08:13 2016 @@ -7,6 +7,8 @@ ; RUN: llc -march=mips -mcpu=mips32r6 -O0 -relocation-model=pic \ ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s +; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips -O0 -relocation-model=pic \ +; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s ; RUN: llc -march=mips -mcpu=mips64 -O0 -relocation-model=pic \ ; RUN: -fast-isel-verbose <%s 2>&1 | FileCheck %s Removed: llvm/branches/release_38/test/CodeGen/Mips/micromips-zero-mat-uses.ll URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/test/CodeGen/Mips/micromips-zero-mat-uses.ll?rev=271121&view=auto ============================================================================== --- llvm/branches/release_38/test/CodeGen/Mips/micromips-zero-mat-uses.ll (original) +++ llvm/branches/release_38/test/CodeGen/Mips/micromips-zero-mat-uses.ll (removed) @@ -1,8 +0,0 @@ -; RUN: llc -march=mips -mcpu=mips32r2 -mattr=+micromips,+nooddspreg -O0 < %s | FileCheck %s - -; CHECK: addiu $[[R0:[0-9]+]], $zero, 0 -; CHECK: subu16 $2, $[[R0]], ${{[0-9]+}} -define i32 @foo() { - %1 = sub i32 0, undef - ret i32 %1 -} _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
