Author: hans Date: Fri Feb 19 15:35:00 2016 New Revision: 261367 URL: http://llvm.org/viewvc/llvm-project?rev=261367&view=rev Log: Merging r261360: ------------------------------------------------------------------------ r261360 | dim | 2016-02-19 12:14:11 -0800 (Fri, 19 Feb 2016) | 19 lines
Fix incorrect selection of AVX512 sqrt when OptForSize is on Summary: When optimizing for size, sqrt calls can be incorrectly selected as AVX512 VSQRT instructions. This is because X86InstrAVX512.td has a `Requires<[OptForSize]>` in its `avx512_sqrt_scalar` multiclass definition. Even if the target does not support AVX512, the class can apparently still be chosen, leading to an incorrect selection of `vsqrtss`. In PR26625, this lead to an assertion: Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!", because the `vsqrtss` instruction requires an XMM register, which is not available on i686 CPUs. Reviewers: grosbach, resistor, joker.eph Subscribers: spatel, emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D17414 ------------------------------------------------------------------------ Added: llvm/branches/release_38/test/CodeGen/X86/pr26625.ll - copied unchanged from r261360, llvm/trunk/test/CodeGen/X86/pr26625.ll Modified: llvm/branches/release_38/ (props changed) llvm/branches/release_38/lib/Target/X86/X86InstrAVX512.td Propchange: llvm/branches/release_38/ ------------------------------------------------------------------------------ --- svn:mergeinfo (original) +++ svn:mergeinfo Fri Feb 19 15:35:00 2016 @@ -1,3 +1,3 @@ /llvm/branches/Apple/Pertwee:110850,110961 /llvm/branches/type-system-rewrite:133420-134817 -/llvm/trunk:155241,257645,257648,257730,257775,257791,257864,257875,257886,257902,257905,257925,257929-257930,257940,257942,257977,257979,257997,258103,258112,258168,258184,258207,258221,258273,258325,258406,258416,258428,258436,258471,258609-258611,258616,258690,258729,258891,258971,259177-259178,259228,259236,259342,259346,259375,259381,259645,259649,259695-259696,259702,259740,259798,259835,259840,259886,259888,259958,260164,260390,260427,260587,260641,260703,260733,261033,261039,261258,261306,261365 +/llvm/trunk:155241,257645,257648,257730,257775,257791,257864,257875,257886,257902,257905,257925,257929-257930,257940,257942,257977,257979,257997,258103,258112,258168,258184,258207,258221,258273,258325,258406,258416,258428,258436,258471,258609-258611,258616,258690,258729,258891,258971,259177-259178,259228,259236,259342,259346,259375,259381,259645,259649,259695-259696,259702,259740,259798,259835,259840,259886,259888,259958,260164,260390,260427,260587,260641,260703,260733,261033,261039,261258,261306,261360,261365 Modified: llvm/branches/release_38/lib/Target/X86/X86InstrAVX512.td URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/X86/X86InstrAVX512.td?rev=261367&r1=261366&r2=261367&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/X86/X86InstrAVX512.td (original) +++ llvm/branches/release_38/lib/Target/X86/X86InstrAVX512.td Fri Feb 19 15:35:00 2016 @@ -5896,7 +5896,7 @@ multiclass avx512_sqrt_scalar<bits<8> op def : Pat<(_.EltVT (OpNode (load addr:$src))), (!cast<Instruction>(NAME#SUFF#Zm) - (_.EltVT (IMPLICIT_DEF)), addr:$src)>, Requires<[OptForSize]>; + (_.EltVT (IMPLICIT_DEF)), addr:$src)>, Requires<[HasAVX512, OptForSize]>; } multiclass avx512_sqrt_scalar_all<bits<8> opc, string OpcodeStr> { _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
