Author: tstellar Date: Tue Jan 26 17:57:01 2016 New Revision: 258885 URL: http://llvm.org/viewvc/llvm-project?rev=258885&view=rev Log: Merging r258386:
------------------------------------------------------------------------ r258386 | thomas.stellard | 2016-01-20 23:28:34 -0500 (Wed, 20 Jan 2016) | 14 lines AMDGPU/SI: Pass whether to use the SI scheduler via Target Attribute Summary: Currently the SI scheduler can be selected via command line option, but it turned out it would be better if it was selectable via a Target Attribute. This patch adds "si-scheduler" attribute to the backend. Reviewers: tstellarAMD, echristo Subscribers: echristo, arsenm Differential Revision: http://reviews.llvm.org/D16192 ------------------------------------------------------------------------ Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.td llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.cpp llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.h llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.td URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.td?rev=258885&r1=258884&r2=258885&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.td (original) +++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPU.td Tue Jan 26 17:57:01 2016 @@ -138,6 +138,11 @@ def FeatureEnableHugeScratchBuffer : Sub "true", "Enable scratch buffer sizes greater than 128 GB">; +def FeatureEnableSIScheduler : SubtargetFeature<"si-scheduler", + "EnableSIScheduler", + "true", + "Enable SI Machine Scheduler">; + class SubtargetFeatureFetchLimit <string Value> : SubtargetFeature <"fetch"#Value, "TexVTXClauseSize", Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.cpp?rev=258885&r1=258884&r2=258885&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.cpp (original) +++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.cpp Tue Jan 26 17:57:01 2016 @@ -78,7 +78,7 @@ AMDGPUSubtarget::AMDGPUSubtarget(const T EnableVGPRSpilling(false), SGPRInitBug(false), IsGCN(false), GCN1Encoding(false), GCN3Encoding(false), CIInsts(false), LDSBankCount(0), IsaVersion(ISAVersion0_0_0), EnableHugeScratchBuffer(false), - FrameLowering(nullptr), + EnableSIScheduler(false), FrameLowering(nullptr), InstrItins(getInstrItineraryForCPU(GPU)), TargetTriple(TT) { initializeSubtargetDependencies(TT, GPU, FS); Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.h URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.h?rev=258885&r1=258884&r2=258885&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.h (original) +++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUSubtarget.h Tue Jan 26 17:57:01 2016 @@ -90,6 +90,7 @@ private: int LDSBankCount; unsigned IsaVersion; bool EnableHugeScratchBuffer; + bool EnableSIScheduler; std::unique_ptr<AMDGPUFrameLowering> FrameLowering; std::unique_ptr<AMDGPUTargetLowering> TLInfo; @@ -280,6 +281,10 @@ public: return EnableHugeScratchBuffer; } + bool enableSIScheduler() const { + return EnableSIScheduler; + } + bool dumpCode() const { return DumpCode; } Modified: llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp URL: http://llvm.org/viewvc/llvm-project/llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp?rev=258885&r1=258884&r2=258885&view=diff ============================================================================== --- llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp (original) +++ llvm/branches/release_38/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp Tue Jan 26 17:57:01 2016 @@ -147,6 +147,8 @@ public: const AMDGPUSubtarget &ST = *getAMDGPUTargetMachine().getSubtargetImpl(); if (ST.getGeneration() <= AMDGPUSubtarget::NORTHERN_ISLANDS) return createR600MachineScheduler(C); + else if (ST.enableSIScheduler()) + return createSIMachineScheduler(C); return nullptr; } _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits
