llvm-branch-commits
Thread
Date
Later messages
Messages by Date
2025/07/11
[llvm-branch-commits] [llvm] [mlir] [IR] Make @llvm.memset prototype byte width dependent (PR #106537)
Sergei Barannikov via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [SimplifyLibCalls] Add initial support for non-8-bit bytes (PR #106542)
Sergei Barannikov via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [clang] [llvm] [ValueTracking] Add CharWidth argument to getConstantStringInfo (NFC) (PR #106541)
Sergei Barannikov via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [IR] Account for byte width in m_PtrAdd (PR #106540)
Sergei Barannikov via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [IRBuilder] Add getByteTy and use it in CreatePtrAdd (PR #106539)
Sergei Barannikov via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [ValueTracking] Make isBytewiseValue byte width agnostic (PR #106538)
Sergei Barannikov via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [mlir] [IR] Make @llvm.memset prototype byte width dependent (PR #106537)
Sergei Barannikov via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)
Ryotaro Kasuga via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)
Benjamin Maxwell via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Akshat Oke via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Akshat Oke via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)
Benjamin Maxwell via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)
Akshat Oke via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)
Akshat Oke via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
Akshat Oke via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
Akshat Oke via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)
Akshat Oke via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)
Akshat Oke via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [lld] ELF: Introduce R_AARCH64_FUNCINIT64 relocation type. (PR #133531)
Peter Smith via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [lld] ELF: Introduce R_AARCH64_FUNCINIT64 relocation type. (PR #133531)
Peter Smith via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [lld] ELF: Introduce R_AARCH64_FUNCINIT64 relocation type. (PR #133531)
Peter Smith via llvm-branch-commits
2025/07/11
[llvm-branch-commits] ELF: Introduce R_AARCH64_PATCHINST relocation type. (PR #133534)
Peter Smith via llvm-branch-commits
2025/07/11
[llvm-branch-commits] ELF: Introduce R_AARCH64_PATCHINST relocation type. (PR #133534)
Peter Smith via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)
Benjamin Maxwell via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)
Benjamin Maxwell via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)
Sander de Smalen via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)
Sander de Smalen via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)
Sander de Smalen via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AArch64] Prepare for split ZPR and PPR area allocation (NFCI) (PR #142391)
Sander de Smalen via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [clang] [CIR] Upstream ComplexImagPtrOp for ComplexType (PR #144236)
Henrich Lauko via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [clang] [CIR] Upstream ComplexImagPtrOp for ComplexType (PR #144236)
Henrich Lauko via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [clang] [CIR] Upstream ComplexImagPtrOp for ComplexType (PR #144236)
Henrich Lauko via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [clang] [CIR] Upstream ComplexImagPtrOp for ComplexType (PR #144236)
Henrich Lauko via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [Offload] Add global variable address/size queries (PR #147972)
Ross Brunton via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Sergei Barannikov via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)
Ryotaro Kasuga via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)
Ryotaro Kasuga via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)
Ryotaro Kasuga via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [Offload] Add `olGetSymbolInfo[Size]` (PR #147962)
Joseph Huber via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [Offload] Add `olGetSymbolInfo[Size]` (PR #147962)
Joseph Huber via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)
Ryotaro Kasuga via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)
via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [DA] Add check for base pointer invariance (PR #148241)
Ryotaro Kasuga via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [clang] [LifetimeSafety] Add expired loans analysis (PR #148222)
via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [clang] [LifetimeSafety] Add expired loans analysis (PR #148222)
Utkarsh Saxena via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [clang] [LifetimeSafety] Add expired loans analysis (PR #148222)
Utkarsh Saxena via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)
Krzysztof Parzyszek via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] 43535be - Revert "[RISCV] AddEdge between mask producer and user of V0 (#146855)"
via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [clang] [LifetimeSafety] Add script for performance benchmarking (PR #147315)
Utkarsh Saxena via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)
Matt Arsenault via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Matt Arsenault via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] DAGCombine PTRADD -> disjoint OR (PR #146075)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Enable ISD::PTRADD for 64-bit AS by default (PR #146076)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in various special cases (PR #145330)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (PR #143881)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [SDAG][AMDGPU] Allow opting in to OOB-generating PTRADD transforms (PR #146074)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns (PR #143880)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in VOP3 patterns (PR #143880)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Handle ISD::PTRADD in VOP3 patterns (PR #143881)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases (PR #145329)
Fabian Ritter via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [libc] [libc] Modular printf option (float only) (PR #147426)
Simon Tatham via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)
Christudasan Devadasan via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)
Jack Styles via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)
Jack Styles via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)
Jack Styles via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Matt Arsenault via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)
Vikram Hegde via llvm-branch-commits
2025/07/11
[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
Matt Arsenault via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
Matt Arsenault via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Account inserted passes for -start/stop options (PR #148111)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Register Function Passes (PR #148109)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #148115)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Stitch up loop passes in codegen pipeline (PR #148114)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU][NPM] Fill in addPreSched2 passes (PR #148112)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Clear MachineFunctions without using PA (PR #148113)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Read TargetMachine's EnableIPRA option (PR #148108)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] Port ProcessImplicitDefs to NPM (PR #148110)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [CodeGen][NPM] VirtRegRewriter: Set VirtReg flag (PR #148107)
Vikram Hegde via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [BOLT] Impute missing trace fall-through (PR #145258)
Amir Ayupov via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [BOLT] Impute missing trace fall-through (PR #145258)
Amir Ayupov via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [flang] [flang][fir] Small clean-up in `fir_DoConcurrentLoopOp`'s defintion (PR #146028)
Kareem Ergawy via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [BOLT] Impute missing trace fall-through (PR #145258)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [BOLT] Impute missing trace fall-through (PR #145258)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [BOLT] Impute missing trace fall-through (PR #145258)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)
Matt Arsenault via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [llvm-profgen] Extend llvm-profgen to generate vtable profiles with data access events. (PR #148013)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [llvm-profgen] Extend llvm-profgen to generate vtable profiles with data access events. (PR #148013)
Mingming Liu via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [llvm-profgen] Extend llvm-profgen to generate vtable profiles with data access events. (PR #148013)
Mingming Liu via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [LifetimeSafety] Implement dataflow analysis for loan propagation (PR #147295)
Utkarsh Saxena via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)
Joe Nash via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)
Stanislav Mekhanoshin via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)
Stanislav Mekhanoshin via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AMDGPU] Negative gfx1250 v_dual_cndmask_b32 tests. NFC. (PR #148057)
Stanislav Mekhanoshin via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AArch64][PAC] Rework discriminator analysis for calls and tail calls (PR #147136)
Anatoly Trosinenko via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AArch64][PAC] Rework discriminator analysis for calls and tail calls (PR #147136)
Anatoly Trosinenko via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AArch64][PAC] Rework discriminator analysis in AUT and AUTPAC (PR #146489)
Anatoly Trosinenko via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AArch64][PAC] Skip llvm.ptrauth.blend intrinsic in GVN PRE (PR #147815)
Anatoly Trosinenko via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AArch64][PAC] Skip llvm.ptrauth.blend intrinsic in GVN PRE (PR #147815)
Anatoly Trosinenko via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [AArch64][PAC] Combine signing with address materialization (PR #130809)
Anatoly Trosinenko via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [NFC][IR2Vec] Minor refactoring of opcode access in vocabulary (PR #147585)
Aiden Grossman via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [NFC][IR2Vec] Minor refactoring of opcode access in vocabulary (PR #147585)
Aiden Grossman via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang-tools-extra] [PATCH 4/4] [clang] Improve nested name specifier AST representation (PR #148015)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang-tools-extra] [PATCH 4/4] [clang] Improve nested name specifier AST representation (PR #148015)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] 7a6584e - Revert "[StructurizeCFG] Hoist and simplify zero-cost incoming else phi value…"
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [PATCH 3/4] [clang] Improve nested name specifier AST representation (PR #148014)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [PATCH 3/4] [clang] Improve nested name specifier AST representation (PR #148014)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [PATCH 3/4] [clang] Improve nested name specifier AST representation (PR #148014)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [PATCH 3/4] [clang] Improve nested name specifier AST representation (PR #148014)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [PATCH 2/4] [clang] Improve nested name specifier AST representation (PR #148012)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)
Finn Plummer via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [NFC][IR2Vec] Minor refactoring of opcode access in vocabulary (PR #147585)
S. VenkataKeerthy via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)
Finn Plummer via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)
Finn Plummer via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)
Finn Plummer via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)
Finn Plummer via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)
Finn Plummer via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)
Krzysztof Parzyszek via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [flang] [flang][OpenMP] Use OmpDirectiveSpecification in DISPATCH (PR #148008)
Krzysztof Parzyszek via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [clang] [llvm] [DirectX] Validate registers are bound to root signature (PR #146785)
Finn Plummer via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [libcxx] [libc++] Add ABI flag to make __tree nodes more compact (PR #147681)
via llvm-branch-commits
2025/07/10
[llvm-branch-commits] [llvm] [Offload] Add `olGetSymbolInfo[Size]` (PR #147962)
Joseph Huber via llvm-branch-commits
Later messages