omjavaid added inline comments.
================
Comment at:
lldb/test/API/commands/register/register/aarch64_dynamic_regset/TestArm64DynamicRegsets.py:201
+ self.runCmd("register write za '{}'".format(za_value))
+ self.expect("register read za", substrs=[za_value])
----------------
How can we differentiate between disabled ZA (read as all zeros) and enabled ZA
actually set to all zeros?
================
Comment at:
lldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_dynamic_resize/TestSVEThreadedDynamic.py:104
+ if mode == Mode.SSVE:
+ cflags += " -DUSE_SSVE"
+ self.build(dictionary={"CFLAGS_EXTRAS": cflags})
----------------
is there a reference somewhere in clang or gcc documentation for USE_SSVE flag?
================
Comment at:
lldb/test/API/commands/register/register/aarch64_za_register/za_dynamic_resize/Makefile:3
+
+CFLAGS_EXTRAS := -march=armv8-a+sve+sme -lpthread
+
----------------
is USE_SSVE a subset of sve+sme?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D159505/new/
https://reviews.llvm.org/D159505
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