Author: Slava Gurevich Date: 2022-08-05T18:33:18-07:00 New Revision: bcac7b3acb1972bdfabe3c84f51243e9a353e7fe
URL: https://github.com/llvm/llvm-project/commit/bcac7b3acb1972bdfabe3c84f51243e9a353e7fe DIFF: https://github.com/llvm/llvm-project/commit/bcac7b3acb1972bdfabe3c84f51243e9a353e7fe.diff LOG: [LLDB] Missing break in a switch statement alters the execution flow. Looks like a typo from the past code changes. Differential Revision: https://reviews.llvm.org/D131244 Added: Modified: lldb/source/Plugins/Process/Utility/ARMUtils.h Removed: ################################################################################ diff --git a/lldb/source/Plugins/Process/Utility/ARMUtils.h b/lldb/source/Plugins/Process/Utility/ARMUtils.h index bbe4c9a35fa6..a7aaa5ac7a1f 100644 --- a/lldb/source/Plugins/Process/Utility/ARMUtils.h +++ b/lldb/source/Plugins/Process/Utility/ARMUtils.h @@ -25,7 +25,8 @@ static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5, ARM_ShifterType &shift_t) { switch (type) { default: - // assert(0 && "Invalid shift type"); + assert(0 && "Invalid shift type"); + break; case 0: shift_t = SRType_LSL; return imm5; @@ -302,7 +303,7 @@ static inline uint32_t ARMExpandImm(uint32_t opcode) { // (imm32, carry_out) = ThumbExpandImm_C(imm12, carry_in) static inline uint32_t ThumbExpandImm_C(uint32_t opcode, uint32_t carry_in, uint32_t &carry_out) { - uint32_t imm32; // the expanded result + uint32_t imm32 = 0; // the expanded result const uint32_t i = bit(opcode, 26); const uint32_t imm3 = bits(opcode, 14, 12); const uint32_t abcdefgh = bits(opcode, 7, 0); @@ -311,6 +312,8 @@ static inline uint32_t ThumbExpandImm_C(uint32_t opcode, uint32_t carry_in, if (bits(imm12, 11, 10) == 0) { switch (bits(imm12, 9, 8)) { default: // Keep static analyzer happy with a default case + break; + case 0: imm32 = abcdefgh; break; _______________________________________________ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits
